[Intel-gfx] [PATCH igt 13/17] intel_chipset: Convert IS_PINEVIEW to device info
Chris Wilson
chris at chris-wilson.co.uk
Wed Jun 29 11:39:03 UTC 2016
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
lib/intel_chipset.h | 12 ++++--------
tools/intel_reg_decode.c | 4 ++--
tools/intel_watermark.c | 2 +-
3 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 4f532a9..a40a857 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -111,10 +111,6 @@ void intel_check_pch(void);
#define PCI_CHIP_IGD_GM 0xA011
#define PCI_CHIP_IGD_G 0xA001
-#define IS_IGDGM(devid) ((devid) == PCI_CHIP_IGD_GM)
-#define IS_IGDG(devid) ((devid) == PCI_CHIP_IGD_G)
-#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid))
-
#define PCI_CHIP_I965_G 0x29A2
#define PCI_CHIP_I965_Q 0x2992
#define PCI_CHIP_I965_G_1 0x2982
@@ -292,10 +288,6 @@ void intel_check_pch(void);
(devid) == PCI_CHIP_I945_GME || \
IS_G33(devid))
-#define IS_G33(devid) ((devid) == PCI_CHIP_G33_G || \
- (devid) == PCI_CHIP_Q33_G || \
- (devid) == PCI_CHIP_Q35_G || IS_IGD(devid))
-
#define IS_HSW_GT1(devid) ((devid) == PCI_CHIP_HASWELL_GT1 || \
(devid) == PCI_CHIP_HASWELL_M_GT1 || \
(devid) == PCI_CHIP_HASWELL_S_GT1 || \
@@ -404,6 +396,10 @@ void intel_check_pch(void);
#define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_HALO_GT4)
+#define IS_PINEVIEW(devid) (intel_device_info(devid)->is_pineview)
+#define IS_G33(devid) (intel_device_info(devid)->is_bearlake || \
+ intel_device_info(devid)->is_pineview)
+
#define IS_IRONLAKE(devid) (intel_device_info(devid)->is_ironlake)
#define IS_ARRANDALE(devid) (intel_device_info(devid)->is_arrandale)
#define IS_IVYBRIDGE(devid) (intel_device_info(devid)->is_ivybridge)
diff --git a/tools/intel_reg_decode.c b/tools/intel_reg_decode.c
index 2536554..71f3ead 100644
--- a/tools/intel_reg_decode.c
+++ b/tools/intel_reg_decode.c
@@ -392,7 +392,7 @@ DEBUGSTRING(i830_debug_vgacntrl)
DEBUGSTRING(i830_debug_fp)
{
- if (IS_IGD(devid)) {
+ if (IS_PINEVIEW(devid)) {
snprintf(result, len, "n = %d, m1 = %d, m2 = %d",
ffs((val & FP_N_IGD_DIV_MASK) >>
FP_N_DIV_SHIFT) - 1,
@@ -496,7 +496,7 @@ DEBUGSTRING(i830_debug_dpll)
}
#endif
} else {
- if (IS_IGD(devid)) {
+ if (IS_PINEVIEW(devid)) {
p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >>
DPLL_FPA01_P1_POST_DIV_SHIFT_IGD);
} else {
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index 133c058..68bd8ec 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -909,7 +909,7 @@ int main(int argc, char *argv[])
g4x_wm_dump();
} else if (IS_GEN4(devid)) {
gen4_wm_dump();
- } else if (IS_IGD(devid)) {
+ } else if (IS_PINEVIEW(devid)) {
pnv_wm_dump();
} else if (IS_GEN3(devid)) {
gen3_wm_dump();
--
2.8.1
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