[Intel-gfx] [PATCH v2] drm/i915/mocs: Program MOCS for all engines on init

[Peter Antoine]

And the program_mocs_control_table(ring) in logical_render_ring_init() is 
not required and can be removed.

Will update that as well after review.

Peter.

On Fri, 11 Mar 2016, Peter Antoine wrote:

> Just seen a documentation error in program_mocs_l3cc_table() still documents 
> a parameter that has been removed. Will fix later.
>
> Peter.
>
> On Fri, 11 Mar 2016, Peter Antoine wrote:
>
>> Hi Chris,
>> 
>> Just posted patch that moves to the engine->init_hw().
>> 
>> Have moved the L3CC registers programming out of the function and left in 
>> the same place as the original function was. These registers are shared 
>> with all engines.
>> 
>> Peter.
>> 
>> On Thu, 10 Mar 2016, Chris Wilson wrote:
>> 
>>> On Thu, Mar 10, 2016 at 08:22:58PM +0000, Peter Antoine wrote:
>>>> Allow for the MOCS to be programmed for all engines.
>>>> Currently we program the MOCS when the first render batch
>>>> goes through. This works on most platforms but fails on
>>>> platforms that do not run a render batch early,
>>>> i.e. headless servers. The patch now programs all initialised engines
>>>> on init and the RCS is programmed again within the initial batch. This
>>>> is done for predictable consistency with regards to the hardware
>>>> context.
>>>> 
>>>> Hardware context loading sets the values of the MOCS for RCS
>>>> and L3CC. Programming them from within the batch makes sure that
>>>> the render context is valid, no matter what the previous state of
>>>> the saved-context was.
>>>> 
>>>> Signed-off-by: Peter Antoine <peter.antoine at intel.com>
>>>> ---
>>>>  drivers/gpu/drm/i915/i915_gem.c   |   3 +
>>>>  drivers/gpu/drm/i915/intel_mocs.c | 138 
>>>> ++++++++++++++++++++++++++++++++++----
>>>>  drivers/gpu/drm/i915/intel_mocs.h |   1 +
>>>>  3 files changed, 130 insertions(+), 12 deletions(-)
>>>> 
>>>> diff --git a/drivers/gpu/drm/i915/i915_gem.c 
>>>> b/drivers/gpu/drm/i915/i915_gem.c
>>>> index b854af2..05c9fcb 100644
>>>> --- a/drivers/gpu/drm/i915/i915_gem.c
>>>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>>>> @@ -32,6 +32,7 @@
>>>>  #include "i915_vgpu.h"
>>>>  #include "i915_trace.h"
>>>>  #include "intel_drv.h"
>>>> +#include "intel_mocs.h"
>>>>  #include <linux/shmem_fs.h>
>>>>  #include <linux/slab.h>
>>>>  #include <linux/swap.h>
>>>> @@ -4882,6 +4883,8 @@ i915_gem_init_hw(struct drm_device *dev)
>>>>  			goto out;
>>>>  	}
>>>> 
>>>> +	intel_program_mocs_engines(dev);
>>> 
>>> Registers to be written when enabling the engine are called from
>>> engine->init_hw() in the line above. Please add this state there, which
>>> can then be specialised via vfunc if so desired.
>>> -Chris
>>> 
>>> 
>> 
>> --
>>   Peter Antoine (Android Graphics Driver Software Engineer)
>>   ---------------------------------------------------------------------
>>   Intel Corporation (UK) Limited
>>   Registered No. 1134945 (England)
>>   Registered Office: Pipers Way, Swindon SN3 1RJ
>>   VAT No: 860 2173 47
>> 
>
> --
>   Peter Antoine (Android Graphics Driver Software Engineer)
>   ---------------------------------------------------------------------
>   Intel Corporation (UK) Limited
>   Registered No. 1134945 (England)
>   Registered Office: Pipers Way, Swindon SN3 1RJ
>   VAT No: 860 2173 47
>

--
    Peter Antoine (Android Graphics Driver Software Engineer)
    ---------------------------------------------------------------------
    Intel Corporation (UK) Limited
    Registered No. 1134945 (England)
    Registered Office: Pipers Way, Swindon SN3 1RJ
    VAT No: 860 2173 47