[Intel-gfx] [RFC PATCH 07/10] drm/i915: abstract get config for cpu transcoder

[Ville Syrjälä]

On Wed, Mar 16, 2016 at 05:26:24PM +0200, Jani Nikula wrote:
> On Wed, 16 Mar 2016, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> > [ text/plain ]
> > On Tue, Mar 15, 2016 at 09:51:15PM +0200, Jani Nikula wrote:
> >> Makes it neater to add the same for DSI transcoder. No functional
> >> changes.
> >> 
> >> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/intel_display.c | 83 ++++++++++++++++++++----------------
> >>  1 file changed, 47 insertions(+), 36 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index e485c1f9ca2b..842467528892 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -9893,6 +9893,49 @@ static void haswell_get_ddi_pll(struct drm_i915_private *dev_priv,
> >>  	pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
> >>  }
> >>  
> >> +static bool hsw_get_trans_config(struct intel_crtc *crtc,
> >> +				 struct intel_crtc_state *pipe_config,
> >> +				 unsigned long *power_domain_mask)
> >> +{
> >
> > To be consistent with existing practices we should probably call this 
> > ..._get_hw_state, or maybe ..._get_transcoder_state (if we want to
> > follow the get_ddi_port_state() below).
> >
> >> +	struct drm_device *dev = crtc->base.dev;
> >> +	struct drm_i915_private *dev_priv = dev->dev_private;
> >> +	enum intel_display_power_domain power_domain;
> >> +	u32 tmp;
> >> +
> >> +	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> >> +
> >> +	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> >> +	if (tmp & TRANS_DDI_FUNC_ENABLE) {
> >
> > I guess as a followup we should do the
> > intel_display_power_get_if_enabled() for the edp transcoder already
> > before this read. Just need to be careful that we don't grab it twice
> > then.
> 
> I checked this while writing the code, and IIUC
> TRANS_DDI_FUNC_CTL(TRANSCODER_EDP) is in always on power.

True, but it does look a bit odd to the eye on the first glance to read
the reg just before grabbing the power reference.

> 
> BR,
> Jani.
> 
> >
> >> +		enum pipe trans_edp_pipe;
> >> +		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> >> +		default:
> >> +			WARN(1, "unknown pipe linked to edp transcoder\n");
> >> +		case TRANS_DDI_EDP_INPUT_A_ONOFF:
> >> +		case TRANS_DDI_EDP_INPUT_A_ON:
> >> +			trans_edp_pipe = PIPE_A;
> >> +			break;
> >> +		case TRANS_DDI_EDP_INPUT_B_ONOFF:
> >> +			trans_edp_pipe = PIPE_B;
> >> +			break;
> >> +		case TRANS_DDI_EDP_INPUT_C_ONOFF:
> >> +			trans_edp_pipe = PIPE_C;
> >> +			break;
> >> +		}
> >> +
> >> +		if (trans_edp_pipe == crtc->pipe)
> >> +			pipe_config->cpu_transcoder = TRANSCODER_EDP;
> >> +	}
> >> +
> >> +	power_domain = POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder);
> >> +	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
> >> +		return false;
> >> +	*power_domain_mask |= BIT(power_domain);
> >> +
> >> +	tmp = I915_READ(PIPECONF(pipe_config->cpu_transcoder));
> >> +
> >> +	return tmp & PIPECONF_ENABLE;
> >> +}
> >> +
> >>  static void haswell_get_ddi_port_state(struct intel_crtc *crtc,
> >>  				       struct intel_crtc_state *pipe_config)
> >>  {
> >> @@ -9943,48 +9986,18 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> >>  	struct drm_i915_private *dev_priv = dev->dev_private;
> >>  	enum intel_display_power_domain power_domain;
> >>  	unsigned long power_domain_mask;
> >> -	uint32_t tmp;
> >> -	bool ret;
> >> +	bool active;
> >>  
> >>  	power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
> >>  	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
> >>  		return false;
> >>  	power_domain_mask = BIT(power_domain);
> >>  
> >> -	ret = false;
> >> -
> >> -	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> >>  	pipe_config->shared_dpll = NULL;
> >>  
> >> -	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> >> -	if (tmp & TRANS_DDI_FUNC_ENABLE) {
> >> -		enum pipe trans_edp_pipe;
> >> -		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> >> -		default:
> >> -			WARN(1, "unknown pipe linked to edp transcoder\n");
> >> -		case TRANS_DDI_EDP_INPUT_A_ONOFF:
> >> -		case TRANS_DDI_EDP_INPUT_A_ON:
> >> -			trans_edp_pipe = PIPE_A;
> >> -			break;
> >> -		case TRANS_DDI_EDP_INPUT_B_ONOFF:
> >> -			trans_edp_pipe = PIPE_B;
> >> -			break;
> >> -		case TRANS_DDI_EDP_INPUT_C_ONOFF:
> >> -			trans_edp_pipe = PIPE_C;
> >> -			break;
> >> -		}
> >> -
> >> -		if (trans_edp_pipe == crtc->pipe)
> >> -			pipe_config->cpu_transcoder = TRANSCODER_EDP;
> >> -	}
> >> -
> >> -	power_domain = POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder);
> >> -	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
> >> -		goto out;
> >> -	power_domain_mask |= BIT(power_domain);
> >> +	active = hsw_get_trans_config(crtc, pipe_config, &power_domain_mask);
> >>  
> >> -	tmp = I915_READ(PIPECONF(pipe_config->cpu_transcoder));
> >> -	if (!(tmp & PIPECONF_ENABLE))
> >> +	if (!active)
> >>  		goto out;
> >>  
> >>  	haswell_get_ddi_port_state(crtc, pipe_config);
> >> @@ -10020,13 +10033,11 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> >>  		pipe_config->pixel_multiplier = 1;
> >>  	}
> >>  
> >> -	ret = true;
> >> -
> >>  out:
> >>  	for_each_power_domain(power_domain, power_domain_mask)
> >>  		intel_display_power_put(dev_priv, power_domain);
> >>  
> >> -	return ret;
> >> +	return active;
> >>  }
> >>  
> >>  static void i845_update_cursor(struct drm_crtc *crtc, u32 base,
> >> -- 
> >> 2.1.4
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Ville Syrjälä
Intel OTC