[Intel-gfx] [PATCH i-g-t v3] igt/gem_pipe_control_store_loop: Add qword write tests

[Chris Wilson]

On Thu, Mar 17, 2016 at 05:15:39PM +0100, Michał Winiarski wrote:
> Test description suggested that all platforms were testing qword writes,
> while in fact only gen4-gen5 did.
> 
> v2: Test dword/qword writes for all available platforms.
> v3: Rewrite, drop libdrm/intel_batchbuffer dependencies,
>     drop brw_emit_post_sync_nonzero_flush WA for gen6/gen7,
>     drop WC_FLUSH/TC_FLUSH on gen4/gen5,
>     drop preuse tests, use gem_wait instead of set_domain.

Sorry was too hasty on the preuse. The problem is the comment is
misleading! The goal is to create a PIN_USER vma (i.e. a vma with no
global GTT alias) and then use it in the execbuf. Bonus points for
making it busy and throwing SIGINTS at it. This is because on gen6 we
have to use the global GTT for the pipecontrol and so we need to fixup
the vma to have the PIN_GLOBAL alias even though we see it is already
allocated in the aliasing-ppgtt.

Along the same lines, in this test I would very much prefer not to use
the PWRITE_IOCTL (gem_write) and use a CPU mmap for uploading. Again,
the goal is be absolutely sure that the PIN_GLOBAL vma does not exist
before we issue the execbuf.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre