[Intel-gfx] [PATCH 1/3] drm/dp: Add definition for Display Control DPCD Registers capability size

[Jani Nikula]

On Wed, 30 Mar 2016, Yetunde Adebisi <yetundex.adebisi at intel.com> wrote:
> This is used when reading Display Control capability Registers on the sink
> device.
>
> cc: Jani Nikula <jani.nikula at intel.com>
> cc: dri-devel at lists.freedesktop.org
> Signed-off-by: Yetunde Adebisi <yetundex.adebisi at intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  include/drm/drm_dp_helper.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 1252108..92d9a52 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
>  #define DP_BRANCH_OUI_HEADER_SIZE	0xc
>  #define DP_RECEIVER_CAP_SIZE		0xf
>  #define EDP_PSR_RECEIVER_CAP_SIZE	2
> +#define EDP_DISPLAY_CTL_CAP_SIZE	3
>  
>  void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
>  void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);

-- 
Jani Nikula, Intel Open Source Technology Center