[Intel-gfx] [PATCH] drm/i915: Bail out of pipe config compute loop on LPT
Chris Wilson
chris at chris-wilson.co.uk
Tue May 3 09:15:19 UTC 2016
On Tue, May 03, 2016 at 10:33:01AM +0200, Daniel Vetter wrote:
> LPT is pch, so might run into the fdi bandwidth constraint (especially
> since it has only 2 lanes). But right now we just force pipe_bpp back
> to 24, resulting in a nice loop (which we bail out with a loud
> WARN_ON). Fix this.
>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=93477
> Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
Tested-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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