[Intel-gfx] [PATCH] drm/i915/sysfs: Adding mocs_state
Ville Syrjälä
ville.syrjala at linux.intel.com
Wed May 4 14:38:41 UTC 2016
On Wed, May 04, 2016 at 02:23:35PM +0000, Antoine, Peter wrote:
> No, It's not debug.
> It's for syncing and aligning (and validating) the open-source userspace with the kernel cache policy.
Why doesn't userspace just use SRM to read registers? The spec gives me
the impression that SRM doesn't care whether the register is privileged
or not.
>
> As for the name being wrong, I'll change that.
>
> As for the sysfs, would you prefer the following structure:
>
> mocs/size
> mocs/control_state
> mocs/l3cc_state
>
> for the different tables?
>
> Peter.
>
> -----Original Message-----
> From: Chris Wilson [mailto:chris at chris-wilson.co.uk]
> Sent: Wednesday, May 4, 2016 2:47 PM
> To: Antoine, Peter <peter.antoine at intel.com>
> Cc: intel-gfx at lists.freedesktop.org; Widawsky, Benjamin <benjamin.widawsky at intel.com>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/sysfs: Adding mocs_state
>
> On Wed, May 04, 2016 at 02:32:53PM +0100, Peter Antoine wrote:
> > Will wait for more comments, then will respin with a different commit
> > message. Is the rest of the patch ok?
>
> No, you've put debug information into sysfs. (Also sysfs is one value per
> file.) sysfs does not match your goal of validation. And you exported an internal function (get_mocs...) without giving it a proper name.
> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
More information about the Intel-gfx
mailing list