[Intel-gfx] [PATCH v2] drm/i915: Allow MI_LOAD_REGISTER_REG between whitelisted registers.
Kenneth Graunke
kenneth at whitecape.org
Sat May 7 07:02:56 UTC 2016
On Friday, May 6, 2016 8:50:14 AM PDT Chris Wilson wrote:
> From: Kenneth Graunke <kenneth at whitecape.org>
>
> Allowing register copies where the source and destination are both
> whitelisted should be safe, and is useful. For example, Mesa uses
> this to load the command streamer math registers with data from the
> pipeline statistics counters.
>
> v2: Reject writes to OACONTROL (and reads as well :(
>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> # v1
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
Oh, probably a good call to disallow OACONTROL. Looks good to me.
Thanks for fixing this up, Chris :)
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: This is a digitally signed message part.
URL: <https://lists.freedesktop.org/archives/intel-gfx/attachments/20160507/bea26644/attachment.sig>
More information about the Intel-gfx
mailing list