[Intel-gfx] [PATCH v4 2/7] drm/i915/guc: distinguish HAS_GUC() from HAS_GUC_UCODE/HAS_GUC_SCHED
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Fri May 13 15:34:13 UTC 2016
On 13/05/16 15:36, Dave Gordon wrote:
> For now, anything with a GuC requires uCode loading, and then supports
> command submission once loaded. But these are logically distinct from
> simply "having a GuC", so we need a separate macro for the latter. Then,
> various tests should use this new macro rather than HAS_GUC_UCODE() or
> testing enable_guc_submission.
>
> v4:
> Added a couple more uses of the new macro.
>
> Signed-off-by: Dave Gordon <david.s.gordon at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 10 ++++++++--
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 4 files changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d9d07b7..3b9ee51 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2726,8 +2726,14 @@ struct drm_i915_cmd_table {
>
> #define HAS_CSR(dev) (IS_GEN9(dev))
>
> -#define HAS_GUC_UCODE(dev) (IS_GEN9(dev) && !IS_KABYLAKE(dev))
> -#define HAS_GUC_SCHED(dev) (IS_GEN9(dev) && !IS_KABYLAKE(dev))
> +/*
> + * For now, anything with a GuC requires uCode loading, and then supports
> + * command submission once loaded. But these are logically independent
> + * properties, so we have separate macros to test them.
> + */
> +#define HAS_GUC(dev) (IS_GEN9(dev) && !IS_KABYLAKE(dev))
> +#define HAS_GUC_UCODE(dev) (HAS_GUC(dev))
> +#define HAS_GUC_SCHED(dev) (HAS_GUC(dev))
>
> #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
> INTEL_INFO(dev)->gen >= 8)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 43e45b7..2a7be71 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4866,7 +4866,7 @@ int i915_gem_init_engines(struct drm_device *dev)
> intel_mocs_init_l3cc_table(dev);
>
> /* We can't enable contexts until all firmware is loaded */
> - if (HAS_GUC_UCODE(dev)) {
> + if (HAS_GUC(dev)) {
> ret = intel_guc_setup(dev);
> if (ret) {
> DRM_ERROR("Failed to initialize GuC, error %d\n", ret);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 1bb0f9a..c584282 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4844,7 +4844,7 @@ static void gen9_enable_rc6(struct drm_i915_private *dev_priv)
> for_each_engine(engine, dev_priv)
> I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10);
>
> - if (HAS_GUC_UCODE(dev_priv))
> + if (HAS_GUC(dev_priv))
> I915_WRITE(GUC_MAX_IDLE_COUNT, 0xA);
>
> I915_WRITE(GEN6_RC_SLEEP, 0);
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 385114b..c1ca458 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1715,7 +1715,7 @@ int intel_guc_reset(struct drm_i915_private *dev_priv)
> int ret;
> unsigned long irqflags;
>
> - if (!i915.enable_guc_submission)
> + if (!HAS_GUC(dev_priv))
> return -EINVAL;
>
> intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Regards,
Tvrtko
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