[Intel-gfx] force DP lane count on Broadwell platform

[Jani Nikula]

On Wed, 18 May 2016, "Sanchez, AdolfoX" <adolfox.sanchez at intel.com> wrote:
> A customer of mine decided to work with a modified DP port with only
> two lanes and is facing issues.  I guess modifying the suggested
> values might be useful at O.S leve, however I was wondering if
> modifyint the register that I mentioned earlier in the VBIOS would
> accomplish the same for the pre-OS stage.

For the most part, the pre-OS stage is a black box to me. So I don't
really know. But if I had to guess, not a chance. DP just isn't that
simple.


BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center