[Intel-gfx] [PATCH 17/21] drm/i915: Update cached cdclk state from broxton_init_cdclk()

[Imre Deak]

On Fri, 2016-05-13 at 23:41 +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Let's make sure our cached cdclk state is accurate right after
> broxton_init_cdclk() whether or not we end up changing the cdclk
> frequency.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Imre Deak <imre.deak at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 0d55e8175573..834373503a8d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5508,13 +5508,10 @@ bool broxton_cdclk_verify_state(struct
> drm_i915_private *dev_priv)
>  
>  void broxton_init_cdclk(struct drm_i915_private *dev_priv)
>  {
> -	/* check if cd clock is enabled */
> -	if (broxton_cdclk_is_enabled(dev_priv)) {
> -		DRM_DEBUG_KMS("CDCLK already enabled, won't
> reprogram it\n");
> -		return;
> -	}
> +	intel_update_cdclk(dev_priv->dev);
>  
> -	DRM_DEBUG_KMS("CDCLK not enabled, enabling it\n");
> +	if (dev_priv->cdclk_pll.vco != 0)
> +		return;
>  
>  	/*
>  	 * FIXME: