[Intel-gfx] [PATCH 4/9] drm/i915: Introduce host graphics memory partition for GVT-g

[Wang, Zhi A]

> -----Original Message-----
> From: Chris Wilson [mailto:chris at chris-wilson.co.uk]
> Sent: Friday, May 20, 2016 3:01 PM
> To: Wang, Zhi A <zhi.a.wang at intel.com>
> Cc: intel-gfx at lists.freedesktop.org; tvrtko.ursulin at linux.intel.com;
> joonas.lahtinen at linux.intel.com; Tian, Kevin <kevin.tian at intel.com>; Lv,
> Zhiyuan <zhiyuan.lv at intel.com>; Niu, Bing <bing.niu at intel.com>
> Subject: Re: [PATCH 4/9] drm/i915: Introduce host graphics memory partition
> for GVT-g
> 
> On Tue, May 17, 2016 at 04:19:04AM -0400, Zhi Wang wrote:
> > From: Bing Niu <bing.niu at intel.com>
> >
> > This patch introduces host graphics memory partition when GVT-g is
> > enabled.
> >
> > Under GVT-g, i915 host driver only owned limited graphics resources,
> > others are managed by GVT-g resource allocator and kept for other vGPUs.
> 
> Strong justification required for why the user is expected to get these right via
> module parameters.
> 
Sure, will add more comments in both code and patches about that.

> > +/*
> > + * Under GVT-g, i915 host driver only owned limited graphics
> > +resources,
> > + * others are managed by GVT-g resource allocator and kept for other
> vGPUs.
> > + *
> > + * For graphics memory space partition, a typical layout looks like:
> > + *
> > + * +-------+-----------------------+------+-----------------------+
> > + * |* Host |   *GVT-g Resource     |* Host|   *GVT-g Resource     |
> > + * | Owned |   Allocator Managed   | Owned|   Allocator Managed   |
> > + * |       |                       |      |
> |
> > + * +---------------+-------+----------------------+-------+-------+
> > + * |       |       |       |       |      |       |       |
> |
> > + * | i915  | vm 1  | vm 2  | vm 3  | i915 | vm 1  | vm 2  | vm 3  |
> > + * |       |       |       |       |      |       |       |
> |
> > + * +-------+-------+-------+--------------+-------+-------+-------+
> > + * |           Aperture            |            Hidden
> |
> > + * +-------------------------------+------------------------------+
> > + * |                       GGTT memory space
> |
> > + * +--------------------------------------------------------------+
> > + */
> >  struct i915_gvt {
> >  	void *gvt;
> > +	u64 low_gm_size;
> > +	u64 high_gm_size;
> >  };
> >
> >  struct i915_virtual_gpu {
> > diff --git a/drivers/gpu/drm/i915/i915_vgpu.c
> > b/drivers/gpu/drm/i915/i915_vgpu.c
> > index 5312816..9382f04 100644
> > --- a/drivers/gpu/drm/i915/i915_vgpu.c
> > +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> > @@ -189,13 +189,24 @@ int intel_vgt_balloon(struct drm_i915_private
> *dev_priv)
> >  	unsigned long unmappable_base, unmappable_size, unmappable_end;
> >  	int ret;
> >
> > -	if (!intel_vgpu_active(dev_priv))
> > +	if (!intel_vgpu_active(dev_priv) && !intel_gvt_active(dev_priv))
> >  		return 0;
> >
> > -	mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
> > -	mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
> > -	unmappable_base =
> I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
> > -	unmappable_size =
> I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
> > +	if (intel_gvt_active(dev_priv)) {
> > +		mappable_base = 0;
> > +		mappable_size = dev_priv->gvt.low_gm_size;
> > +		unmappable_base = dev_priv->ggtt.mappable_end;
> > +		unmappable_size = dev_priv->gvt.high_gm_size;
> > +	} else if (intel_vgpu_active(dev_priv)) {
> > +		mappable_base = I915_READ(
> > +				vgtif_reg(avail_rs.mappable_gmadr.base));
> > +		mappable_size = I915_READ(
> > +				vgtif_reg(avail_rs.mappable_gmadr.size));
> > +		unmappable_base = I915_READ(
> > +				vgtif_reg(avail_rs.nonmappable_gmadr.base));
> > +		unmappable_size = I915_READ(
> > +				vgtif_reg(avail_rs.nonmappable_gmadr.size));
> > +	}
> else
> 	return 0;
> 
> and lose the early return.

OK.

> -Chris
> 
> --
> Chris Wilson, Intel Open Source Technology Centre