[Intel-gfx] [PATCH] drm/i915: fix BSM_MASK definition

[Jani Nikula]

The PCI config space BSM (Base of Stolen Memory) register has bits
20..31 set. The BSM_MASK definition goes beyond 32 bits, fix it.

drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of ‘65535 << 20’
requires 37 bits to represent, but ‘int’ only has 32 bits
[-Wshift-overflow=]

References: http://mid.gmane.org/CAMzoambf23FJH3Lq-gKcrVEus-bqFLxA35n0YjKGhqWOAJdBqg@mail.gmail.com
Reported-by: David Binderman <linuxdev.baldrick at gmail.com>
Cc: David Binderman <linuxdev.baldrick at gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Fixes: e10fa551ae37 ("drm/i915: Clean up PCI config register handling")
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b407411e31ba..769ac8f7ab61 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -87,7 +87,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define   DEVEN_MCHBAR_EN (1 << 28)
 
 #define BSM 0x5c
-#define   BSM_MASK (0xFFFF << 20)
+#define   BSM_MASK (0xFFF << 20)
 
 #define HPLLCC	0xc0 /* 85x only */
 #define   GC_CLOCK_CONTROL_MASK		(0x7 << 0)
-- 
2.1.4