[Intel-gfx] drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ?

Jani Nikula jani.nikula at linux.intel.com
Mon May 30 14:51:16 UTC 2016


On Mon, 30 May 2016, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Mon, May 30, 2016 at 11:32:59AM +0100, David Binderman wrote:
>> Hello there,
>> 
>> drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of β€˜65535 <<
>> 20’ requires 37 bits to represent, but β€˜int’ only has 32 bits
>> [-Wshift-overflow=]
>> 
>> Source code is
>> 
>> #define   BSM_MASK (0xFFFF << 20)
>> 
>> Maybe better code
>> 
>> #define   BSM_MASK (((unsigned long) 0xFFFF) << 20)
>
> #define BSM_MASK (~0u << 20)
>
> It should be a 32bit mask. The current (with the exception of undefined
> behaviour of shifting into the signbit, fortunately gcc does what we
> expect) code is functionally current as the mask will be truncated to
> 32bits.

In the patch I used BSM_MASK (0xFFF << 20). It does have the UB of
shifting into the sign bit, but then we have loads of e.g. (1 << 31) in
i915_reg.h which is no different.

The original code before e10fa551ae37b had ~((1<<20) - 1).

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center


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