[Intel-gfx] [PATCH] drm/i915: Introduce HAS_64BIT_RELOC

[Joonas Lahtinen]

Unify {use,has}_64bit_reloc into dev_priv->info.

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              | 3 +++
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   | 8 +++-----
 drivers/gpu/drm/i915/i915_gem_render_state.c | 3 +--
 drivers/gpu/drm/i915/i915_pci.c              | 3 ++-
 4 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eaa01da..ae0217d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -670,6 +670,7 @@ struct intel_csr {
 	func(is_kabylake); \
 	func(is_preliminary); \
 	/* Keep has_* in alphabetical order */ \
+	func(has_64bit_reloc); \
 	func(has_csr); \
 	func(has_ddi); \
 	func(has_dp_mst); \
@@ -2917,6 +2918,8 @@ struct drm_i915_cmd_table {
 #define HAS_CSR(dev)	(INTEL_INFO(dev)->has_csr)
 
 #define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
+#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
+
 /*
  * For now, anything with a GuC requires uCode loading, and then supports
  * command submission once loaded. But these are logically independent
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c35e847..3e73f77 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -322,7 +322,6 @@ struct reloc_cache {
 	struct drm_mm_node node;
 	unsigned long vaddr;
 	unsigned int page;
-	bool use_64bit_reloc;
 };
 
 static void reloc_cache_init(struct reloc_cache *cache,
@@ -331,7 +330,6 @@ static void reloc_cache_init(struct reloc_cache *cache,
 	cache->page = -1;
 	cache->vaddr = 0;
 	cache->i915 = i915;
-	cache->use_64bit_reloc = INTEL_GEN(cache->i915) >= 8;
 	cache->node.allocated = false;
 }
 
@@ -519,7 +517,7 @@ relocate_entry(struct drm_i915_gem_object *obj,
 	       u64 target_offset)
 {
 	u64 offset = reloc->offset;
-	bool wide = cache->use_64bit_reloc;
+	bool wide = HAS_64BIT_RELOC(cache->i915);
 	void *vaddr;
 
 	target_offset = relocation_target(reloc, target_offset);
@@ -552,6 +550,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 	struct drm_gem_object *target_obj;
 	struct drm_i915_gem_object *target_i915_obj;
 	struct i915_vma *target_vma;
+	const size_t reloc_w = HAS_64BIT_RELOC(dev_priv) ? 8 : 4;
 	uint64_t target_offset;
 	int ret;
 
@@ -608,8 +607,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 		return 0;
 
 	/* Check that the relocation address is valid... */
-	if (unlikely(reloc->offset >
-		     obj->base.size - (cache->use_64bit_reloc ? 8 : 4))) {
+	if (unlikely(reloc->offset > obj->base.size - reloc_w)) {
 		DRM_DEBUG("Relocation beyond object bounds: "
 			  "obj %p target %d offset %d size %d.\n",
 			  obj, reloc->target_handle,
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 57918f2..5af19b0 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -74,7 +74,6 @@ static int render_state_setup(struct intel_render_state *so,
 			      struct drm_i915_private *i915)
 {
 	const struct intel_renderstate_rodata *rodata = so->rodata;
-	const bool has_64bit_reloc = INTEL_GEN(i915) >= 8;
 	struct drm_i915_gem_object *obj = so->vma->obj;
 	unsigned int i = 0, reloc_index = 0;
 	unsigned int needs_clflush;
@@ -93,7 +92,7 @@ static int render_state_setup(struct intel_render_state *so,
 		if (i * 4  == rodata->reloc[reloc_index]) {
 			u64 r = s + so->vma->node.start;
 			s = lower_32_bits(r);
-			if (has_64bit_reloc) {
+			if (HAS_64BIT_RELOC(i915)) {
 				if (i + 1 >= rodata->batch_items ||
 				    rodata->batch[i + 1] != 0)
 					goto err;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 31e6edd..9d2b5d3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -288,7 +288,8 @@ static const struct intel_device_info intel_haswell_info = {
 #define BDW_FEATURES \
 	HSW_FEATURES, \
 	BDW_COLORS, \
-	.has_logical_ring_contexts = 1
+	.has_logical_ring_contexts = 1, \
+	.has_64bit_reloc = 1
 
 static const struct intel_device_info intel_broadwell_info = {
 	BDW_FEATURES,
-- 
2.7.4