[Intel-gfx] [PATCH 1/3] drm/i915: Remove chipset flush after cache flush

[Chris Wilson]

On Mon, Nov 07, 2016 at 06:16:00PM +0200, Joonas Lahtinen wrote:
> On ma, 2016-11-07 at 12:10 +0000, Chris Wilson wrote:
> > On Mon, Nov 07, 2016 at 02:01:46PM +0200, Joonas Lahtinen wrote:
> > > 
> > > On su, 2016-11-06 at 12:59 +0000, Chris Wilson wrote:
> > > > 
> > > > We always flush the chipset prior to executing with the GPU, so we can
> > > > skip the flush during ordinary domain management.
> > > > 
> > > > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > > 
> > > Maybe even add?
> > > 
> > > Fixes: dcd79934b0dd ("drm/i915: Unconditionally flush any chipset buffers before execbuf")
> > 
> > It is just an optimisation - I don't want to imply that we should be
> 
> Well, it's an optimization that fixes a commit which duplicated the
> call. That might be a regression in some micro-benchmark.
> 
> But fine without the tag too, if you're sure it's not a big one.

Added the reference to the commit, but without the fixes tag since I
don't think it is a big deal (as the number of unconditional chipset
flushes will be much greater than the number of unneeded flushes removed
in this patch).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre