[Intel-gfx] [PATCH 0/5] Handle Link Training Failure during modeset

Manasi Navare manasi.d.navare at intel.com
Thu Nov 10 04:42:03 UTC 2016


Link training failure is handled by lowering the link rate first
until it reaches the minimum and keeping the lane count maximum
and then lowering the lane count until it reaches minimim. These
fallback values are saved and hotplug uevent is sent to the userspace
after setting the connector link status property to BAD. Userspace
should triiger another modeset on a uevent and if link status property
is BAD. This will retrain the link at fallback values.
This is repeated until the link is successfully trained.

This has been validated to pass DP compliance.

Manasi Navare (5):
  drm: Add a new connector property for link status
  drm/i915: Set link status property for DP connector
  drm/i915: Update CRTC state if connector link status property changed
  drm/i915: Find fallback link rate/lane count
  drm/i915: Implement Link Rate fallback on Link training failure

 drivers/gpu/drm/drm_atomic_helper.c           |   7 ++
 drivers/gpu/drm/drm_connector.c               |  17 ++++
 drivers/gpu/drm/i915/intel_ddi.c              |  21 +++-
 drivers/gpu/drm/i915/intel_dp.c               | 138 +++++++++++++++++++++++++-
 drivers/gpu/drm/i915/intel_dp_link_training.c |  12 ++-
 drivers/gpu/drm/i915/intel_drv.h              |  12 ++-
 include/drm/drm_connector.h                   |   7 +-
 include/drm/drm_crtc.h                        |   5 +
 include/uapi/drm/drm_mode.h                   |   4 +
 9 files changed, 214 insertions(+), 9 deletions(-)

-- 
1.9.1



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