[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,01/11] drm/i915: Create distinct lockclasses for execution vs user timelines (rev2)

Saarinen, Jani jani.saarinen at intel.com
Thu Nov 10 12:04:51 UTC 2016


Hi, 
> == Series Details ==
> 
> Series: series starting with [v2,01/11] drm/i915: Create distinct lockclasses for
> execution vs user timelines (rev2)
> URL   : https://patchwork.freedesktop.org/series/14926/
> State : success
> 
> == Summary ==
> 
> Series 14926v2 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/14926/revisions/2/mbox/
> 
> 
> fi-byt-j1900     total:244  pass:216  dwarn:0   dfail:0   fail:0   skip:28
> fi-byt-n2820     total:244  pass:212  dwarn:0   dfail:0   fail:0   skip:32
> fi-hsw-4770      total:244  pass:224  dwarn:0   dfail:0   fail:0   skip:20
> fi-hsw-4770r     total:244  pass:224  dwarn:0   dfail:0   fail:0   skip:20
> fi-ilk-650       total:244  pass:191  dwarn:0   dfail:0   fail:0   skip:53
> fi-ivb-3520m     total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22
> fi-ivb-3770      total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22
> fi-snb-2520m     total:244  pass:212  dwarn:0   dfail:0   fail:0   skip:32
> fi-snb-2600      total:244  pass:211  dwarn:0   dfail:0   fail:0   skip:33
> fi-kbl-7200u failed to connect after reboot
Please note that all Gen8+ machines did not boot with this patched kernel.

> 
> eb88955cdc6a1f4dabff6bc27747c1c9e9a3aaef drm-intel-nightly: 2016y-11m-
> 10d-09h-29m-41s UTC integration manifest b0e329d drm/i915: Support explicit
> fencing for execbuf 6c4e06f drm/i915: Enable userspace to opt-out of implicit
> fencing
> bfe3e23 drm/i915/scheduler: Support user-defined priorities
> 465ba68 HACK drm/i915/scheduler: emulate a scheduler for guc f39120b
> drm/i915/scheduler: Boost priorities for flips
> 27e53d9 drm/i915/scheduler: Record all dependencies upon request
> construction dda333d drm/i915/scheduler: Signal the arrival of a new request
> f1edd87 drm/i915: Remove engine->execlist_lock aad42bc drm/i915: Defer
> transfer onto execution timeline to actual hw submission
> c646d89 drm/i915: Split request submit/execute phase into two 67c609a
> drm/i915: Create distinct lockclasses for execution vs user timelines
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2954/


Jani Saarinen
Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo




More information about the Intel-gfx mailing list