[Intel-gfx] [PATCH 04/15] drm/i915/glk: Add a IS_GEN9_LP() macro

[Ander Conselvan de Oliveira]

Broxton and Geminilake are both gen9lp platforms. To avoid adding
IS_GEMINILAKE() checks everywhere alongside the IS_BROXTON() ones, add a
IS_GEN9_LP() macro.

v2: Rename macro parameter to dev_priv. (Joonas)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 3 +++
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8a99e6e..4bb745a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -669,6 +669,7 @@ struct intel_csr {
 	func(is_broxton); \
 	func(is_geminilake); \
 	func(is_kabylake); \
+	func(is_lp); \
 	func(is_preliminary); \
 	/* Keep has_* in alphabetical order */ \
 	func(has_64bit_reloc); \
@@ -2844,6 +2845,8 @@ struct drm_i915_cmd_table {
 #define IS_GEN8(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(7)))
 #define IS_GEN9(dev_priv)	(!!((dev_priv)->info.gen_mask & BIT(8)))
 
+#define IS_GEN9_LP(dev_priv)	(IS_GEN9(dev_priv) && INTEL_INFO(dev_priv)->is_lp)
+
 #define ENGINE_MASK(id)	BIT(id)
 #define RENDER_RING	ENGINE_MASK(RCS)
 #define BSD_RING	ENGINE_MASK(VCS)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1b188e1..3801f8b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -345,6 +345,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
 
 #define GEN9_LP_FEATURES \
 	.gen = 9, \
+	.is_lp = 1, \
 	.has_hotplug = 1, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.num_pipes = 3, \
-- 
2.5.5