[Intel-gfx] [PATCH] drm/i915: fix the dequeue logic for single_port_submission context
Min He
min.he at intel.com
Wed Nov 16 06:11:16 UTC 2016
For a singl_port_submission context, it can only be submitted to port 0,
and there shouldn't be any other context in port 1 at the same time.
This patch is to implement the correct logic in execlists_dequeue.
Signed-off-by: Min He <min.he at intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f50feaa..be83e8c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -424,9 +424,6 @@ static bool can_merge_ctx(const struct i915_gem_context *prev,
if (prev != next)
return false;
- if (ctx_single_port_submission(prev))
- return false;
-
return true;
}
@@ -477,6 +474,13 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
struct drm_i915_gem_request *cursor =
rb_entry(rb, typeof(*cursor), priotree.node);
+ /* If last ctx is single_submission, it means we can only
+ * submit this context in port 0, and cannot submit another
+ * context in port 1 at the same time. So we will break here
+ * in this situation.
+ */
+ if (last && ctx_single_port_submission(last->ctx))
+ break;
/* Can we combine this request with the current port? It has to
* be the same context/ringbuffer and not have any exceptions
* (e.g. GVT saying never to combine contexts).
--
1.9.1
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