[Intel-gfx] [PATCH i-g-t v6 06/21] tests/sw_sync: Add subtest test_sync_busy

[robert.foss at collabora.com]

From: Robert Foss <robert.foss at collabora.com>

This subtest verifies that waiting on fences works properly.

Signed-off-by: Robert Foss <robert.foss at collabora.com>
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
---
 tests/sw_sync.c | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index ecc75ca..9667b93 100644
--- a/tests/sw_sync.c
+++ b/tests/sw_sync.c
@@ -81,6 +81,40 @@ static void test_alloc_merge_fence(void)
 	close(timeline[1]);
 }
 
+static void test_sync_busy(void)
+{
+	int fence, ret;
+	int timeline;
+
+	timeline = sw_sync_timeline_create();
+	fence = sw_sync_fence_create(timeline, 5);
+
+	/* Make sure that fence has not been signaled yet */
+	ret = sync_wait(fence, 0);
+	igt_assert_f(ret == -1 && errno == ETIME, "Fence signaled early (timeline value 0, fence seqno 5)\n");
+
+	/* Advance timeline from 0 -> 1 */
+	sw_sync_timeline_inc(timeline, 1);
+
+	/* Make sure that fence has not been signaled yet */
+	ret = sync_wait(fence, 0);
+	igt_assert_f(ret == -1 && errno == ETIME, "Fence signaled early (timeline value 1, fence seqno 5)\n");
+
+	/* Advance timeline from 1 -> 5: signaling the fence (seqno 5)*/
+	sw_sync_timeline_inc(timeline, 4);
+
+	ret = sync_wait(fence, 0);
+	igt_assert_f(ret == 0, "Fence not signaled (timeline value 5, fence seqno 5)\n");
+
+	/* Go even further, and confirm wait still succeeds */
+	sw_sync_timeline_inc(timeline, 10);
+	ret = sync_wait(fence, 0);
+	igt_assert_f(ret == 0, "Fence not signaled! (timeline value 10, fence seqno 5)\n");
+
+	close(fence);
+	close(timeline);
+}
+
 igt_main
 {
 	igt_subtest("alloc_timeline")
@@ -94,5 +128,8 @@ igt_main
 
 	igt_subtest("alloc_merge_fence")
 		test_alloc_merge_fence();
+
+	igt_subtest("sync_busy")
+		test_sync_busy();
 }
 
-- 
2.10.2