[Intel-gfx] [PATCH] drm/i915: Move the release of PT page to the upper caller

[Zhi Wang]

Thanks Michał! Have a good day. :P

On 11/22/16 22:39, Michał Winiarski wrote:
> On Mon, Nov 21, 2016 at 07:44:26PM +0800, Zhi Wang wrote:
>> a PT page will be released if it doesn't contain any meaningful mappings
>> during PPGTT page table shrinking. The PT entry in the upper level will
>> be set to a scratch entry.
>>
>> Normally this works nicely, but in virtualization world, the PPGTT page
>> table is tracked by hypervisor. Releasing the PT page before modifying
>> the upper level PT entry would cause extra efforts.
>>
>> As the tracked page has been returned to OS before losing track from
>> hypervisor, it could be written in any pattern. Hypervisor has to recognize
>> if a page is still being used as a PT page by validating these writing
>> patterns. It's complicated. Better let the guest modify the PT entry in
>> upper level PT first, then release the PT page.
>
> Reviewed-by: Michał Winiarski <michal.winiarski at intel.com>
>
> -Michał
>
>> Cc: Michał Winiarski <michal.winiarski at intel.com>
>> Cc: Michel Thierry <michel.thierry at intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Zhenyu Wang <zhenyuw at linux.intel.com>
>> Cc: Zhiyuan Lv <zhiyuan.lv at intel.com>
>> Signed-off-by: Zhi Wang <zhi.a.wang at intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_gem_gtt.c | 18 +++++++-----------
>>   1 file changed, 7 insertions(+), 11 deletions(-)