[Intel-gfx] [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Nov 29 19:36:23 UTC 2016
On Tue, Nov 29, 2016 at 02:40:45PM +0000, Matthew Auld wrote:
> On 29 November 2016 at 14:13, <ville.syrjala at linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Looks like we're only initializing dev_priv->atomic_cdclk_freq
> > at resume and commit times, not at init time. Let's do that as
> > well.
> >
> > We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in
> > hsw_compute_linetime_wm() on account of populating
> > intel_state->cdclk from dev_priv->atomic_cdclk_freq.
> > Previously we were mispopulating intel_state->cdclk with
> > dev_priv->cdclk_freq which always had a proper value at init
> > time and hence the WARN_ON() didn't trigger.
> >
> > Cc: stable at vger.kernel.org
> > Cc: Matthew Auld <matthew.auld at intel.com>
> > Reported-by: Matthew Auld <matthew.auld at intel.com>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902
> > Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things")
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Tested-by: Matthew Auld <matthew.auld at intel.com>
> Reviewed-by: Matthew Auld <matthew.auld at intel.com>
Pushed to dinq. Thanks for the testing and review.
--
Ville Syrjälä
Intel OTC
More information about the Intel-gfx
mailing list