[Intel-gfx] [PATCH 1/8] drm/i915: Share the computation of ring size for RING_CTL register
Chris Wilson
chris at chris-wilson.co.uk
Mon Oct 3 13:00:30 UTC 2016
On Mon, Oct 03, 2016 at 01:52:39PM +0100, Chris Wilson wrote:
> Since both legacy and execlists want to poopulate the RING_CTL register,
> share the computation of the right bits for the ring->size. We can then
> stop masking errors and explicitly forbid them during creation!
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/intel_ringbuffer.c | 5 ++---
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8d44cee710f0..acc767a52d8e 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1605,6 +1605,7 @@ enum skl_disp_power_wells {
> #define RING_HEAD(base) _MMIO((base)+0x34)
> #define RING_START(base) _MMIO((base)+0x38)
> #define RING_CTL(base) _MMIO((base)+0x3c)
> +#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */
> #define RING_SYNC_0(base) _MMIO((base)+0x40)
> #define RING_SYNC_1(base) _MMIO((base)+0x44)
> #define RING_SYNC_2(base) _MMIO((base)+0x48)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 2d8eb2eb2b72..5ede272eb4d2 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1946,7 +1946,7 @@ populate_lr_context(struct i915_gem_context *ctx,
> RING_START(engine->mmio_base), 0);
> ASSIGN_CTX_REG(reg_state, CTX_RING_BUFFER_CONTROL,
> RING_CTL(engine->mmio_base),
> - ((ring->size - PAGE_SIZE) & RING_NR_PAGES) | RING_VALID);
> + RING_CTL_SIZE(ring->size) | RING_VALID);
> ASSIGN_CTX_REG(reg_state, CTX_BB_HEAD_U,
> RING_BBADDR_UDW(engine->mmio_base), 0);
> ASSIGN_CTX_REG(reg_state, CTX_BB_HEAD_L,
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 67ea9dd5921e..26aa4c5e268f 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -585,9 +585,7 @@ static int init_ring_common(struct intel_engine_cs *engine)
> I915_WRITE_TAIL(engine, ring->tail);
> (void)I915_READ_TAIL(engine);
>
> - I915_WRITE_CTL(engine,
> - ((ring->size - PAGE_SIZE) & RING_NR_PAGES)
> - | RING_VALID);
> + I915_WRITE_CTL(engine, RING_CTL_SIZE(ring->size) | RING_VALID);
>
> /* If the head is still not zero, the ring is dead */
> if (intel_wait_for_register_fw(dev_priv, RING_CTL(engine->mmio_base),
> @@ -1951,6 +1949,7 @@ intel_engine_create_ring(struct intel_engine_cs *engine, int size)
> struct i915_vma *vma;
>
> GEM_BUG_ON(!is_power_of_2(size));
> + GEM_BUG_ON(size & ~RING_NR_PAGES);
(size - PAGE_SIZE) & ~RING_NR_PAGES
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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