[Intel-gfx] [PATCH] drm/i915/gen9: Remove WaEnableYV12BugFixInHalfSliceChicken7

Mika Kuoppala mika.kuoppala at linux.intel.com
Tue Oct 18 13:15:22 UTC 2016


Mika Kuoppala <mika.kuoppala at linux.intel.com> writes:

> Arkadiusz Hiler <arkadiusz.hiler at intel.com> writes:
>
>> Dropping WA because it was for early steppings.
>>
>> It is fixed in newer preproduction and all production revisions.
>>
>
> We have used References tag to point to a relevant document
> that has more information. Like for this, it should be:
>
> References: HSD#2126385
>
> From there I did figure out that this should be from skl:C0 onwards.
>
> So based on that, we need this wa still.

I fell victim of out-of-date/conflicting information.
Arkadiusz kindly pointed me to the correct sources and cleared
the confusion. I am convinced we can drop this workaround.

Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>

>
> -Mika
>
>
>> Cc: Michal Winiarski <michal.winiarski at intel.com>
>> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler at intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_ringbuffer.c | 2 --
>>  1 file changed, 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index e107455..32786ba 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -849,10 +849,8 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>>  		 */
>>  	}
>>  
>> -	/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt,kbl */
>>  	/* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt,kbl */
>>  	WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
>> -			  GEN9_ENABLE_YV12_BUGFIX |
>>  			  GEN9_ENABLE_GPGPU_PREEMPTION);
>>  
>>  	/* Wa4x4STCOptimizationDisable:skl,bxt,kbl */
>> -- 
>> 2.7.4
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