[Intel-gfx] [PATCH 3/8] drm/i915/skl+: Remove minimum block allocation from crtc state.

Paulo Zanoni paulo.r.zanoni at intel.com
Thu Oct 20 17:24:13 UTC 2016


Em Qua, 2016-10-19 às 15:13 -0700, Matt Roper escreveu:
> On Wed, Oct 12, 2016 at 03:28:16PM +0200, Maarten Lankhorst wrote:
> > 
> > This is not required any more now that we get fresh state from
> > drm_atomic_crtc_state_for_each_plane_state. Zero all state
> > in advance.
> > 
> > Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com
> > >
> 
> Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

You could also get rid of the unsafe loop that computes alloc_size:
just do it in the main loop now that we iterate over everything. But
this can be done in a separate patch.

> 
> > 
> > ---
> >  drivers/gpu/drm/i915/intel_drv.h |  4 ----
> >  drivers/gpu/drm/i915/intel_pm.c  | 15 +++++----------
> >  2 files changed, 5 insertions(+), 14 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 888054518f3c..a176e6cebab3 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -501,10 +501,6 @@ struct intel_crtc_wm_state {
> >  			/* gen9+ only needs 1-step wm programming
> > */
> >  			struct skl_pipe_wm optimal;
> >  			struct skl_ddb_entry ddb;
> > -
> > -			/* minimum block allocation */
> > -			uint16_t minimum_blocks[I915_MAX_PLANES];
> > -			uint16_t
> > minimum_y_blocks[I915_MAX_PLANES];
> >  		} skl;
> >  	};
> >  
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 97b6202c4097..83c1b0acef38 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3356,8 +3356,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state
> > *cstate,
> >  	enum pipe pipe = intel_crtc->pipe;
> >  	struct skl_ddb_entry *alloc = &cstate->wm.skl.ddb;
> >  	uint16_t alloc_size, start, cursor_blocks;
> > -	uint16_t *minimum = cstate->wm.skl.minimum_blocks;
> > -	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
> > +	uint16_t minimum[I915_MAX_PLANES] = {};
> > +	uint16_t y_minimum[I915_MAX_PLANES] = {};
> >  	unsigned int total_data_rate;
> >  	int num_active;
> >  	int id, i;
> > @@ -3398,16 +3398,11 @@ skl_allocate_pipe_ddb(struct
> > intel_crtc_state *cstate,
> >  		if (intel_plane->pipe != pipe)
> >  			continue;
> >  
> > -		if (!pstate->visible) {
> > -			minimum[id] = 0;
> > -			y_minimum[id] = 0;
> > +		if (!pstate->visible)
> >  			continue;
> > -		}
> > -		if (plane->type == DRM_PLANE_TYPE_CURSOR) {
> > -			minimum[id] = 0;
> > -			y_minimum[id] = 0;
> > +
> > +		if (plane->type == DRM_PLANE_TYPE_CURSOR)
> >  			continue;
> > -		}
> >  
> >  		minimum[id] = skl_ddb_min_alloc(pstate, 0);
> >  		y_minimum[id] = skl_ddb_min_alloc(pstate, 1);
> > -- 
> > 2.7.4
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 


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