[Intel-gfx] [PATCH] drm/i915: Stop setting SNB min-freq-table 0 on powersave setup

[Ville Syrjälä]

On Fri, Oct 21, 2016 at 09:55:31PM +0100, Chris Wilson wrote:
> The min-freq-table is an array of values that match each CPU frequency to
> an equivalent GPU frequency. Setting a single value of 0 on init is both
> illegal (generates an error from the PCU) and nonsensical. Let's see if
> we survive without that error.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Yeah never made any sense. If we really wanted to reset the table, we'd
have to set every valid entry to 0.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index b65208e23a08..ba3d1e97986a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5589,10 +5589,6 @@ static void gen6_enable_rps(struct drm_i915_private *dev_priv)
>  	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 50000);
>  	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
>  
> -	ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
> -	if (ret)
> -		DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
> -
>  	reset_rps(dev_priv, gen6_set_rps);
>  
>  	rc6vids = 0;
> -- 
> 2.9.3
> 
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-- 
Ville Syrjälä
Intel OTC