[Intel-gfx] [PATCH v4 10/22] drm/i915: Move HAS_RC6p definition to platform definition
Rodrigo Vivi
rodrigo.vivi at gmail.com
Wed Sep 7 22:52:38 UTC 2016
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
On Wed, Aug 17, 2016 at 12:30:45PM -0700, Carlos Santa wrote:
> Moving all GPU features to the platform struct definition allows for
> - standard place when adding new features from new platforms
> - possible to see supported features when dumping struct
> definitions
>
> Signed-off-by: Carlos Santa <carlos.santa at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 ++-
> drivers/gpu/drm/i915/i915_pci.c | 3 +++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 46fc71a..f20a3e3 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -651,6 +651,7 @@ struct intel_csr {
> func(has_csr) sep \
> func(has_resource_streamer) sep \
> func(has_rc6) sep \
> + func(has_rc6p) sep \
> func(has_pipe_cxsr) sep \
> func(has_hotplug) sep \
> func(cursor_needs_physical) sep \
> @@ -2788,7 +2789,7 @@ struct drm_i915_cmd_table {
> #define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr)
> #define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->has_runtime_pm)
> #define HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
> -#define HAS_RC6p(dev) (IS_GEN6(dev) || IS_IVYBRIDGE(dev))
> +#define HAS_RC6p(dev) (INTEL_INFO(dev)->has_rc6p)
>
> #define HAS_CSR(dev) (INTEL_INFO(dev)->has_csr)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 42108dc..c6a5bd0 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -202,6 +202,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> .has_llc = 1, \
> .has_rc6 = 1, \
> + .has_rc6p = 1, \
> GEN_DEFAULT_PIPEOFFSETS, \
> CURSOR_OFFSETS
>
> @@ -221,6 +222,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
> .has_llc = 1, \
> .has_rc6 = 1, \
> + .has_rc6p = 1, \
> GEN_DEFAULT_PIPEOFFSETS, \
> IVB_CURSOR_OFFSETS
>
> @@ -264,6 +266,7 @@ static const struct intel_device_info intel_valleyview_info = {
> .has_fpga_dbg = 1, \
> .has_psr = 1, \
> .has_resource_streamer = 1, \
> + .has_rc6p = 0 /* RC6p removed-by HSW */, \
> .has_runtime_pm = 1
>
> static const struct intel_device_info intel_haswell_info = {
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
More information about the Intel-gfx
mailing list