[Intel-gfx] [PATCH v4 16/26] drm/i915/slpc: Add slpc support for max/min freq

[Chris Wilson]

On Fri, Sep 09, 2016 at 06:21:35PM +0530, Sagar Arun Kamble wrote:
> From: Tom O'Rourke <Tom.O'Rourke at intel.com>
> 
> Update sysfs and debugfs functions to set SLPC
> parameters when setting max/min frequency.
> 
> v1: Update for SLPC 2015.2.4 (params for both slice and unslice)
>     Replace HAS_SLPC with intel_slpc_active() (Paulo)
> 
> Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 18 ++++++++++++++++++
>  drivers/gpu/drm/i915/i915_sysfs.c   | 18 ++++++++++++++++++
>  2 files changed, 36 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 71bce32..0956d1f 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4873,6 +4873,15 @@ i915_max_freq_set(void *data, u64 val)
>  
>  	dev_priv->rps.max_freq_softlimit = val;
>  
> +	if (intel_slpc_active(dev_priv)) {
> +		intel_slpc_set_param(dev_priv,
> +				     SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
> +				     (u32) intel_gpu_freq(dev_priv, val));

Hmm, there are a lot of these casts. Why?

Changing intel_gpu_freq(), intel_freq_opcode() to take and return
unsigned would help.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre