[Intel-gfx] [PATCH 12/38] drm/i915: Reuse the active golden render state batch

Joonas Lahtinen joonas.lahtinen at linux.intel.com
Mon Sep 26 07:24:58 UTC 2016


On ti, 2016-09-20 at 09:29 +0100, Chris Wilson wrote:
> @@ -143,88 +149,126 @@ static int render_state_setup(struct render_state *so)
>  	}
>  
>  	OUT_BATCH(d, i, MI_BATCH_BUFFER_END);
> -	so->aux_batch_size = (i * sizeof(u32)) - so->aux_batch_offset;
> -
> +	so->aux_size = i * sizeof(u32) - so->aux_offset;
> +	so->aux_offset += so->batch_offset;
>  	/*
>  	 * Since we are sending length, we need to strictly conform to
>  	 * all requirements. For Gen2 this must be a multiple of 8.
>  	 */
> -	so->aux_batch_size = ALIGN(so->aux_batch_size, 8);
> +	so->aux_size = ALIGN(so->aux_size, 8);
>  
> -	kunmap(page);
> +	if (needs_clflush)
> +		drm_clflush_virt_range(d, i*sizeof(u32));

Spaces around *

Reviewed-by: Joonas Lahtinen <joonas.lahtien at linux.intel.com>

Horrible patch to review, code motion and little changes in between.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation


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