[Intel-gfx] [PATCH 2/3] drm/i915: Call synchronize_irq() after resetting the GPU

[Chris Wilson]

On Fri, Sep 30, 2016 at 11:26:55AM +0300, Mika Kuoppala wrote:
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > When we reset the GPU, we want to reinitialise it from a known step. In
> > order to do so, we have to flush any pending operations from the irq
> > handler and its tasklets. Add a missing synchronize_irq().
> >
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index 1418c1c522cb..d037da8ea449 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -2581,8 +2581,6 @@ static void i915_gem_reset_engine(struct intel_engine_cs *engine)
> >  	struct i915_gem_context *incomplete_ctx;
> >  	bool ring_hung;
> >  
> > -	/* Ensure irq handler finishes, and not run again. */
> > -	tasklet_kill(&engine->irq_tasklet);
> >  	if (engine->irq_seqno_barrier)
> >  		engine->irq_seqno_barrier(engine);
> >  
> > @@ -2624,6 +2622,11 @@ void i915_gem_reset(struct drm_i915_private *dev_priv)
> >  
> >  	i915_gem_retire_requests(dev_priv);
> >  
> > +	/* Ensure irq handler finishes, and not run again. */
> > +	synchronize_irq(dev_priv->drm.irq);
> > +	for_each_engine(engine, dev_priv)
> > +		tasklet_kill(&engine->irq_tasklet);
> > +
> 
> But you still might get one tasklet run if there was interrupt pending,
> post reset?
> 
> How about this kind of ordering:
> 
> engine->disable_irq();
> synchronize_irq();
> tasklet_kill(engine);
> 
> intel_gpu_reset();
> i915_gem_reset();
> 
> Perhaps I am paranoid but I want to guarantee the frozen state
> before we hit the reset button.

Yeah, we may as way bite the bullet and uninstall the irq around the
reset. We don't yet have a callback to simply mask the engines/execlists.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre