[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: rest of refactoring, link rate fallback

[Patchwork]

== Series Details ==

Series: drm/i915/dp: rest of refactoring, link rate fallback
URL   : https://patchwork.freedesktop.org/series/22586/
State : success

== Summary ==

Series 22586v1 drm/i915/dp: rest of refactoring, link rate fallback
https://patchwork.freedesktop.org/api/1.0/series/22586/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time: 428s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time: 426s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time: 566s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time: 508s
fi-bxt-t5700     total:278  pass:258  dwarn:0   dfail:0   fail:0   skip:20  time: 546s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time: 483s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time: 485s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time: 411s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time: 402s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time: 419s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 489s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 474s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time: 454s
fi-kbl-7560u     total:278  pass:267  dwarn:1   dfail:0   fail:0   skip:10  time: 566s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 450s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time: 574s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time: 462s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time: 492s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time: 435s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time: 526s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time: 402s

e087f8395ca39c6988de8680bd6f80a20b08c0f4 drm-tip: 2017y-04m-06d-13h-28m-42s UTC integration manifest
32e033d drm/i915: Implement Link Rate fallback on Link training failure
7b669fb drm/i915/dp: Validate cached link rate and lane count before retraining
eb1b3252 drm/i915/dp: read sink count to a temporary variable first
e575e14 drm/i915/dp: use readb and writeb calls for single byte DPCD access
3df04b8 drm/i915/dp: localize link rate index variable more
dcd419b drm/i915/mst: use max link not sink lane count
c57a383 drm/i915/dp: add functions for max common link rate and lane count
688e493 drm/i915/dp: don't call the link parameters sink parameters
960daae drm/i915/dp: do not limit rate seek when not needed
2f414b3 drm/i915/dp: cache common rates with sink rates
f648e2e drm/i915/dp: use the sink rates array for max sink rates

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4420/