[Intel-gfx] [PATCH 2/5] drm/i915: Lift timeline ordering to await_dma_fence
Chris Wilson
chris at chris-wilson.co.uk
Mon Apr 10 08:55:53 UTC 2017
Currently we filter out repeated use of the same timeline in the low
level i915_gem_request_await_request(), after having added the
dependency on the old request. However, we can lift this to
i915_gem_request_await_dma_fence() (before the dependency is added)
using the observation that requests along the same timeline are
explicitly ordered via i915_add_request (along with the dependencies).
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
drivers/gpu/drm/i915/i915_gem_request.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 313cdff7c6dd..31874a38752e 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -663,6 +663,7 @@ i915_gem_request_await_request(struct drm_i915_gem_request *to,
int ret;
GEM_BUG_ON(to == from);
+ GEM_BUG_ON(to->timeline == from->timeline);
if (to->engine->schedule) {
ret = i915_priotree_add_dependency(to->i915,
@@ -672,9 +673,6 @@ i915_gem_request_await_request(struct drm_i915_gem_request *to,
return ret;
}
- if (to->timeline == from->timeline)
- return 0;
-
if (to->engine == from->engine) {
ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
&from->submit,
@@ -723,6 +721,13 @@ i915_gem_request_await_dma_fence(struct drm_i915_gem_request *req,
if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
return 0;
+ /* Requests on the same timeline are explicitly ordered, along with
+ * their dependencies, by i915_add_request() which ensures that requests
+ * are submitted in-order through each ring.
+ */
+ if (fence->context == req->fence.context)
+ return 0;
+
if (dma_fence_is_i915(fence))
return i915_gem_request_await_request(req, to_request(fence));
--
2.11.0
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