[Intel-gfx] [PATCH 1/5] drm/i915: Mark up clflushes as belonging to an unordered timeline

[Joonas Lahtinen]

On ma, 2017-04-10 at 09:55 +0100, Chris Wilson wrote:
> 2 clflushes on two different objects are not ordered, and so do not
> belong to the same timeline (context). Either we use a unique context
> for each, or we reserve a special global context to mean unordered.
> Ideally, we would reserve 0 to mean unordered (DMA_FENCE_NO_CONTEXT) to
> have the same semantics everywhere.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>

<SNIP>

> @@ -157,7 +156,7 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj,
>  		dma_fence_init(&clflush->dma,
>  			       &i915_clflush_ops,
>  			       &clflush_lock,
> -			       clflush_context,
> +			       to_i915(obj->base.dev)->mm.unordered_timeline,

It seems you have high confidence on being able to replace this line
with DMA_FENCE_NO_CONTEXT ;)

Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation