[Intel-gfx] [PATCH 04/67] drm/i915/cnp: Add Backlight support to CNP PCH.

[Jani Nikula]

On Fri, 07 Apr 2017, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Thu, Apr 06, 2017 at 12:15:00PM -0700, Rodrigo Vivi wrote:
>> Backlight support on Cannonpoint is a lot
>> likely Broxton, but with only one controller (0).
>
> This being the PCH backlight obviously. I guess we still don't have any
> use for the CPU backlight?
>
> Oh, since the utility pin is on the CPU I think we should perhaps add
> HAS_PCH_SPLIT checks around the useage of the utility pin in the BXT
> backlight functions, or some comments. Or perhaps even split out CNP+
> vs. BXT entirely? Otherwise I think people might get confused by the
> utility pin references.

Please split out. This is what I've been doing and promoting in
intel_panel.c.

BR,
Jani.

>
>> 
>> Also other main changes/differences:
>> 
>> - PWM clock frequency = Raw clock frequency = 19.2 MHz or
>>   24 MHz.  Value is found in SFUSE_STRAP.
>> - PWM increment = 1
>> 
>> v2: Reuse BXT functions with controller 0 instead of
>>     redefining it. (Jani).
>>     Use dev_priv->rawclk_freq instead of getting the value
>>     from SFUSE_STRAP.
>> v3: Avoid setup backligh controller along with hooks and
>>     fully reuse hooks setup as suggested by Jani.
>> v4: Clean up commit message.
>> v5: Implement per PCH instead per platform.
>> 
>> Cc: Jani Nikula <jani.nikula at intel.com>
>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_panel.c | 19 +++++++++++++++++--
>>  1 file changed, 17 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
>> index cb50c52..1978bec 100644
>> --- a/drivers/gpu/drm/i915/intel_panel.c
>> +++ b/drivers/gpu/drm/i915/intel_panel.c
>> @@ -1247,6 +1247,18 @@ static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
>>  }
>>  
>>  /*
>> + * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
>> + *      Value is found in SFUSE_STRAP.
>> + *      PWM increment = 1
>> + */
>> +static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
>> +{
>> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>> +
>> +	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
>> +}
>> +
>> +/*
>>   * SPT: This value represents the period of the PWM stream in clock periods
>>   * multiplied by 16 (default increment) or 128 (alternate increment selected in
>>   * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
>> @@ -1742,13 +1754,16 @@ void intel_panel_destroy_backlight(struct drm_connector *connector)
>>  	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
>>  		return;
>>  
>> -	if (IS_GEN9_LP(dev_priv)) {
>> +	if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) {
>>  		panel->backlight.setup = bxt_setup_backlight;
>>  		panel->backlight.enable = bxt_enable_backlight;
>>  		panel->backlight.disable = bxt_disable_backlight;
>>  		panel->backlight.set = bxt_set_backlight;
>>  		panel->backlight.get = bxt_get_backlight;
>> -		panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
>> +		if (IS_GEN9_LP(dev_priv))
>> +			panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
>> +		else
>> +			panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
>>  	} else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
>>  		   HAS_PCH_KBP(dev_priv)) {
>>  		panel->backlight.setup = lpt_setup_backlight;
>> -- 
>> 1.9.1
>> 
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-- 
Jani Nikula, Intel Open Source Technology Center