[Intel-gfx] [PATCH 4/5] drm/i915: Use __intel_uncore_wait_for_register_fw for sandybride_pcode_read
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Tue Apr 11 11:28:11 UTC 2017
On 11/04/2017 11:13, Chris Wilson wrote:
> Since the sandybridge_pcode_read() may be called from
> skl_pcode_request() inside an atomic context (with preempt disabled), we
> should avoid hitting any sleeping paths.
Please update the commit to mention the timeout decrease and with that:
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Regards,
Tvrtko
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 55e1e88cd361..cacb65fa2dd5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8135,9 +8135,9 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val
> I915_WRITE_FW(GEN6_PCODE_DATA1, 0);
> I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
>
> - if (intel_wait_for_register_fw(dev_priv,
> - GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
> - 500)) {
> + if (__intel_wait_for_register_fw(dev_priv,
> + GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
> + 500, 0, NULL)) {
> DRM_ERROR("timeout waiting for pcode read (%d) to finish\n", mbox);
> return -ETIMEDOUT;
> }
> @@ -8180,9 +8180,9 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
> I915_WRITE_FW(GEN6_PCODE_DATA1, 0);
> I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox);
>
> - if (intel_wait_for_register_fw(dev_priv,
> - GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
> - 500)) {
> + if (__intel_wait_for_register_fw(dev_priv,
> + GEN6_PCODE_MAILBOX, GEN6_PCODE_READY, 0,
> + 500, 0, NULL)) {
> DRM_ERROR("timeout waiting for pcode write (%d) to finish\n", mbox);
> return -ETIMEDOUT;
> }
>
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