[Intel-gfx] [PATCH v4 09/11] drm/i915/dp: read sink count to a temporary variable first

[Navare, Manasi D]

Thanks Jani for pushing patches 1-9.
Now we just need review on Patch 10 (Validate cached link rate and lane count), may
Be Ville can review that. I have submitted new revision based on his comments already.
 
And Patch 11 already has your R-b.

Regards
Manasi

On Thu, 06 Apr 2017, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Thu, Apr 06, 2017 at 04:44:17PM +0300, Jani Nikula wrote:
>> Don't clobber intel_dp->sink_count with the raw value.
>> 
>> Suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Thanks for the reviews, pushed patches 1-9 to drm-intel-next-queued.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center