[Intel-gfx] [PATCH 02/67] drm/i915/cnp: Add PCI ID for Cannonpoint LP PCH

[Srivatsa, Anusha]

>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of
>Rodrigo Vivi
>Sent: Thursday, April 6, 2017 12:15 PM
>To: intel-gfx at lists.freedesktop.org
>Cc: Pandiyan, Dhinakaran <dhinakaran.pandiyan at intel.com>; Vivi, Rodrigo
><rodrigo.vivi at intel.com>
>Subject: [Intel-gfx] [PATCH 02/67] drm/i915/cnp: Add PCI ID for Cannonpoint LP
>PCH
>
>From: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
>
>The first two bytes of PCI ID for CNP_LP PCH are the same as that of SPT_LP. We
>should really be looking at the first 9 bits instead of the first 8 to identify
>platforms, although this seems to have not caused any problems on earlier
>platforms. Introduce a 9 bit extended mask for SPT and CNP while not touching
>the code for any of the other platforms.
>
>v2: (Rodrigo) Make platform agnostic and fix commit message.
>
>Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>

> drivers/gpu/drm/i915/i915_drv.c | 7 ++++++-  drivers/gpu/drm/i915/i915_drv.h |
>4 ++++
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>index 05e3f3f..836db0d 100644
>--- a/drivers/gpu/drm/i915/i915_drv.c
>+++ b/drivers/gpu/drm/i915/i915_drv.c
>@@ -170,6 +170,8 @@ static void intel_detect_pch(struct drm_i915_private
>*dev_priv)
> 	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
> 		if (pch->vendor == PCI_VENDOR_ID_INTEL) {
> 			unsigned short id = pch->device &
>INTEL_PCH_DEVICE_ID_MASK;
>+			unsigned short id_ext = pch->device &
>INTEL_PCH_DEVICE_ID_MASK_EXT;
>+
> 			dev_priv->pch_id = id;
>
> 			if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) { @@ -206,7
>+208,7 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> 				DRM_DEBUG_KMS("Found SunrisePoint
>PCH\n");
> 				WARN_ON(!IS_SKYLAKE(dev_priv) &&
> 					!IS_KABYLAKE(dev_priv));
>-			} else if (id == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE) {
>+			} else if (id_ext == INTEL_PCH_SPT_LP_DEVICE_ID_TYPE)
>{
> 				dev_priv->pch_type = PCH_SPT;
> 				DRM_DEBUG_KMS("Found SunrisePoint LP
>PCH\n");
> 				WARN_ON(!IS_SKYLAKE(dev_priv) &&
>@@ -219,6 +221,9 @@ static void intel_detect_pch(struct drm_i915_private
>*dev_priv)
> 			} else if (id == INTEL_PCH_CNP_DEVICE_ID_TYPE) {
> 				dev_priv->pch_type = PCH_CNP;
> 				DRM_DEBUG_KMS("Found CannonPoint
>PCH\n");
>+			} else if (id_ext ==
>INTEL_PCH_CNP_LP_DEVICE_ID_TYPE) {
>+				dev_priv->pch_type = PCH_CNP;
>+				DRM_DEBUG_KMS("Found CannonPoint LP
>PCH\n");
> 			} else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
> 				   (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
> 				   ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE)
>&& diff --git a/drivers/gpu/drm/i915/i915_drv.h
>b/drivers/gpu/drm/i915/i915_drv.h index d798976..2685f12 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -2941,6 +2941,7 @@ static inline struct scatterlist *__sg_next(struct
>scatterlist *sg)
> #define HAS_POOLED_EU(dev_priv)	((dev_priv)->info.has_pooled_eu)
>
> #define INTEL_PCH_DEVICE_ID_MASK		0xff00
>+#define INTEL_PCH_DEVICE_ID_MASK_EXT		0xff80
> #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
> #define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
> #define INTEL_PCH_PPT_DEVICE_ID_TYPE		0x1e00
>@@ -2950,12 +2951,15 @@ static inline struct scatterlist *__sg_next(struct
>scatterlist *sg)
> #define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00
> #define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA200
> #define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300
>+#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE		0x9D80
> #define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100
> #define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000
> #define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35
>has 2918 */
>
> #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)  #define
>HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
>+#define HAS_PCH_CNP_LP(dev_priv) \
>+	((dev_priv)->pch_id == INTEL_PCH_CNP_LP_DEVICE_ID_TYPE)
> #define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP)
>#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
>#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)
>--
>1.9.1
>
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