[Intel-gfx] [PATCH 00/15] drm/i915: Two stage watermarks for g4x
Lofstedt, Marta
marta.lofstedt at intel.com
Mon Apr 24 14:20:19 UTC 2017
Thanks Ville,
I have verified that below patch-set fix the CI regression on the Core2 duo, see bug: https://bugs.freedesktop.org/show_bug.cgi?id=100548
So, if/when this patch-set lands, I assume we could revert the revert of the "sched/clock: Fix broken stable to unstable transfer": git at 841c8c9
/Marta
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf
> Of ville.syrjala at linux.intel.com
> Sent: Friday, April 21, 2017 9:14 PM
> To: intel-gfx at lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 00/15] drm/i915: Two stage watermarks for g4x
>
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> This makes g4x follow the two stage watermark programming approach as
> well, and as a bonus exposes the video sprites on g4x.
>
> There is one slight problem with merging the wms from multiple pipes; If one
> pipe is currently enabled and we're about to enabled another one, we
> should turn off CxSR before the second pipe gets enabled as the FIFO will get
> repartitioned. This could also happen when there's a parallel watermark
> update on the first pipe, so a dumb approach of just disabling CxSR in the
> modeset path doesn't really work. I think the proper fix will involve some
> shuffling of code in the modeset path because it's currently a bit of a mess.
> So with the current code there could be an occasional underrun reported
> when enabling the second pipe.
>
> Entire series available here:
> git://github.com/vsyrjala/linux.git g4x_atomic_wm_8
>
> Ville Syrjälä (15):
> drm/i915: s/vlv_plane_wm_compute/vlv_raw_plane_wm_compute/ etc.
> drm/i915: Drop the debug message from vlv_get_fifo_size()
> drm/i915: s/vlv_num_wm_levels/intel_wm_num_levels/
> drm/i915: Rename bunch of vlv_ watermark structures to g4x_
> drm/i915: Make vlv/chv watermark debug print less cryptic
> drm/i915: Document CxSR
> drm/i915: Fix cursor 'cpp' in watermark calculatins for old platforms
> drm/i915: Fix the g4x watermark TLB miss workaround
> drm/i915: Refactor the g4x TLB miss w/a to a helper
> drm/i915: Refactor wm calculations
> drm/i915: Apply the g4x TLB miss w/a to SR watermarks as well
> drm/i915: Two stage watermarks for g4x
> drm/i915: Enable HPLL watermarks on g4x
> drm/i915: Add g4x watermark tracepoint
> drm/i915: Add support for sprites on g4x
>
> drivers/gpu/drm/i915/i915_debugfs.c | 12 +-
> drivers/gpu/drm/i915/i915_drv.h | 20 +-
> drivers/gpu/drm/i915/i915_trace.h | 49 ++
> drivers/gpu/drm/i915/intel_device_info.c | 2 +-
> drivers/gpu/drm/i915/intel_display.c | 29 +-
> drivers/gpu/drm/i915/intel_drv.h | 34 +-
> drivers/gpu/drm/i915/intel_pm.c | 1254 ++++++++++++++++++++++---
> -----
> drivers/gpu/drm/i915/intel_sprite.c | 18 +-
> 8 files changed, 1081 insertions(+), 337 deletions(-)
>
> --
> 2.10.2
>
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