[Intel-gfx] [PATCH v4] drm/i915/edp: Read link status more times when EQ not done

[Lee, Shawn C]

From: "Lee, Shawn C" <shawn.c.lee at intel.com>

Display driver read DPCD register 0x202, 0x203 and 0x204 to identify
eDP sink status.If PSR exit is ongoing at eDP sink, and eDP source
read these registers at the same time. Panel will report EQ & symbol
lock not done. It will cause panel display flicking.
Try to read link status more times if eDP EQ not done. Panel side
request at least 1000us for fast link train while doing PSR exit.
So wait more than 1000us then retrieve sink's status again.
Change log:
v2:
- modify this mechanism just used for eDP + PSR enabled.
v3:
- move the intel_dp_get_link_status() call closer to the
  drm_dp_channel_eq_ok()
v4:
- Rebase / minor typo fix.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99639
TEST=Reboot DUT and no flicking on local display at login screen

Cc: Cooper Chiou <cooper.chiou at intel.com>
Cc: Gary C Wang <gary.c.wang at intel.com>
Cc: Jani Nikula <jani.nikula at intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Cc: Jim Bride <jim.bride at intel.com>

Signed-off-by: Shawn Lee <shawn.c.lee at intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   36 +++++++++++++++++++++++++-----------
 1 file changed, 25 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 08834f74d396..7d2b68c538cf 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4256,15 +4256,11 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
 {
 	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-	u8 link_status[DP_LINK_STATUS_SIZE];
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u8 link_status[DP_LINK_STATUS_SIZE], retry = 1;
 
 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
 
-	if (!intel_dp_get_link_status(intel_dp, link_status)) {
-		DRM_ERROR("Failed to get link status\n");
-		return;
-	}
-
 	if (!intel_encoder->base.crtc)
 		return;
 
@@ -4278,13 +4274,31 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
 	if (!intel_dp_link_params_valid(intel_dp))
 		return;
 
-	/* Retrain if Channel EQ or CR not ok */
-	if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) {
-		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
-			      intel_encoder->base.name);
+	if (is_edp(intel_dp) && dev_priv->psr.enabled)
+		retry = 3;
+
+	while (retry--) {
+		if (!intel_dp_get_link_status(intel_dp, link_status)) {
+			DRM_ERROR("Failed to get link status\n");
+			return;
+		}
 
-		intel_dp_retrain_link(intel_dp);
+		if (drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))
+			return;
+
+		/*
+		 * EQ not ok may caused by fast link train while exit PSR active,
+		 * wait at least 1000 us then read it again.
+		 */
+		if (retry)
+			usleep_range(1000, 1500);
 	}
+
+	/* Retrain if Channel EQ or CR not ok */
+	DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
+	      intel_encoder->base.name);
+
+	intel_dp_retrain_link(intel_dp);
 }
 
 /*
-- 
1.7.9.5