[Intel-gfx] [PATCH] drm/i915/edp: Read link status after exit PSR

[Chris Wilson]

On Thu, Apr 27, 2017 at 10:35:22PM +0800, Lee, Shawn C wrote:
> From: "Lee, Shawn C" <shawn.c.lee at intel.com>
> 
> Display driver read DPCD register 0x202, 0x203 and 0x204 to identify
> eDP sink status. If PSR exit is ongoing at eDP sink, and eDP source
> read these registers at the same time. Panel will report EQ & symbol
> lock not done. It will cause panel display flicking.
> So driver have to make sure PSR already exit before read link status.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99639
> TEST=Reboot DUT and no flicking on local display at login screen
> 
> Cc: Cooper Chiou <cooper.chiou at intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Jim Bride <jim.bride at intel.com>
> Cc: Ryan Lin <ryan.lin at intel.com>
> 
> Signed-off-by: Shawn Lee <shawn.c.lee at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   34 +++++++++++++++++++++++++++++-----
>  1 file changed, 29 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 08834f74d396..cc431337b2dc 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4252,19 +4252,35 @@ static void intel_dp_handle_test_request(struct intel_dp *intel_dp)
>  }
>  
>  static void
> +intel_edp_wait_PSR_exit(struct intel_dp *intel_dp)
> +{
> +	struct drm_device *dev = intel_dp_to_dev(intel_dp);
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	u32 srd_status, count = 100;
> +
> +	while (count--) {
> +		srd_status = I915_READ(EDP_PSR_STATUS_CTL);
> +
> +		if ((srd_status & EDP_PSR_STATUS_SENDING_TP1) ||
> +		    (srd_status & EDP_PSR_STATUS_SENDING_TP2_TP3) ||
> +		    (srd_status & EDP_PSR_STATUS_SENDING_IDLE) ||
> +		    (srd_status & EDP_PSR_STATUS_AUX_SENDING)) {
> +			usleep_range(100, 150);
> +		} else
> +			return;
> +	}

See intel_wait_for_register(i915,
			    EDP_PSR_STATUS_CTL,
			    (EDP_PSR_STATUS_SENDING_TP1 |
			     EDP_PSR_STATUS_SENDING_TP2_TP3 |
			     EDP_PSR_STATUS_SENDING_IDLE |
			     EDP_PSR_STATUS_AUX_SENDING),
			     0,
			     15);
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre