[Intel-gfx] [PATCH v3] drm/i915: enable WaDisableDopClkGating for skl

Rodrigo Vivi rodrigo.vivi at gmail.com
Thu Aug 3 19:31:55 UTC 2017


merged to dinq.
thanks for patch and review

On Thu, Aug 3, 2017 at 10:41 AM, Praveen Paneri <paneri at gmail.com> wrote:
> On Thu, Aug 3, 2017 at 11:07 PM, Rodrigo Vivi <rodrigo.vivi at gmail.com> wrote:
>> On Thu, Aug 3, 2017 at 10:32 AM, Praveen Paneri
>> <praveen.paneri at intel.com> wrote:
>>> This WA is required when decoupled frequencies for slice and unslice
>>> are enabled. This disables DOP clock gating for skl.
>>>
>>> v2: enable the WA for all gen9 platforms (not just for SKL GT4 where
>>>     the hang issue is originally reported) to avoid rare hangs (David)
>>> v3: as per WaDatabase, enable it only for SKL (Rodrigo)
>>
>> I think this deserved a "v4" mark to avoid confusions when checking
>> for the CI results.
> Will keep this in mind going fwd
>>
>> But I will pay attention on results for 170168 which is the latest one
>> and if it pass I can merge that for you.
>> https://patchwork.freedesktop.org/patch/170168/
> that will be great
>
> Thanks,
> Praveen
>>
>>>
>>> Cc: David Weinehall <david.weinehall at linux.intel.com>
>>> Reviewed-by: David Weinehall <david.weinehall at linux.intel.com>
>>> Signed-off-by: Praveen Paneri <praveen.paneri at intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>>>  1 file changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>>> index 90c2d60..a880c94 100644
>>> --- a/drivers/gpu/drm/i915/intel_pm.c
>>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>>> @@ -78,6 +78,12 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
>>>         /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */
>>>         I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
>>>                    ILK_DPFC_DISABLE_DUMMY0);
>>> +
>>> +       if (IS_SKYLAKE(dev_priv)) {
>>> +               /* WaDisableDopClockGating */
>>> +               I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL)
>>> +                          & ~GEN7_DOP_CLOCK_GATE_ENABLE);
>>> +       }
>>>  }
>>>
>>>  static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
>>> --
>>> 1.9.1
>>>
>>> _______________________________________________
>>> Intel-gfx mailing list
>>> Intel-gfx at lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>>
>>
>>
>> --
>> Rodrigo Vivi
>> Blog: http://blog.vivi.eng.br
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br


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