[Intel-gfx] [PATCH] drm/i915: Perform an invalidate prior to executing golden renderstate

[Chris Wilson]

Quoting Mika Kuoppala (2017-08-08 14:36:39)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > As we may have just bound the renderstate into the GGTT for execution, we
> > need to ensure that the GTT TLB are also flushed.
> >
> > On snb-gt2, this would cause a random GPU hang at the start of a new
> > context (e.g. boot) and on snb-gt1, it was causing the renderstate batch
> > to take ~10s. It was the GPU hang that revealed the truth, as the CS
> > gleefully executed beyond the end of the golden renderstate batch, a good
> > indicator for a GTT TLB miss.
> >
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Cc: stable at vger.kernel.org
> 
> The flush has been there but got stomped by:
> 
> Fixes: dc4be6071a24 ("drm/i915: Add explicit request management to i915_gem_init_hw()")
> 
> Now we can fix the gen6 renderstate too ;)
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>

Added 
Fixes: 20fe17aa52dc ("drm/i915: Remove redundant TLB invalidate on switching contexts")
and pushed. Still weird that I can't see anything resembling this on the
farm, despite the two snb machines I have having weird problems. Also
the effect is so random, a TLB miss!, it is hard to imagine devising a
better test (every igt allocates at least one new context executing the
renderstate, and so having an opportunity to hit a bug.)

Thanks,
-Chris