[Intel-gfx] [PATCH igt] tools/null_state_gen: Add proper color calc and depth stencil states

Mika Kuoppala mika.kuoppala at linux.intel.com
Wed Aug 9 09:27:15 UTC 2017


We were just pointing these states blindly into the 1k offset
in the bb. Make a suitable sized and aligned null block and
point both indirect state pointers to that block.

v2: move blend state generation into the same function

Reported-by: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
---
 tools/null_state_gen/intel_renderstate_gen6.c | 64 ++++++++++++++++-----------
 1 file changed, 39 insertions(+), 25 deletions(-)

diff --git a/tools/null_state_gen/intel_renderstate_gen6.c b/tools/null_state_gen/intel_renderstate_gen6.c
index 5c1b7f97..1aa97d39 100644
--- a/tools/null_state_gen/intel_renderstate_gen6.c
+++ b/tools/null_state_gen/intel_renderstate_gen6.c
@@ -216,13 +216,46 @@ gen6_emit_invariant(struct intel_batchbuffer *batch)
 	OUT_BATCH(1);
 }
 
+static uint32_t
+gen6_create_cc_blend(struct intel_batchbuffer *batch)
+{
+	struct gen6_blend_state blend;
+
+	memset(&blend, 0, sizeof(blend));
+
+	blend.blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO;
+	blend.blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE;
+	blend.blend0.blend_func = GEN6_BLENDFUNCTION_ADD;
+	blend.blend0.blend_enable = 1;
+
+	blend.blend1.post_blend_clamp_enable = 1;
+	blend.blend1.pre_blend_clamp_enable = 1;
+
+	return OUT_STATE_STRUCT(blend, 64);
+}
+
 static void
-gen6_emit_cc(struct intel_batchbuffer *batch, uint32_t blend)
+gen6_emit_cc(struct intel_batchbuffer *batch)
 {
+	struct null_blk_s {
+		union {
+			struct gen6_depth_stencil_state s_state;
+			struct gen6_color_calc_state c_state;
+		};
+	} null_block;
+	uint32_t null_block_offset, blend_offset;
+
+	memset(&null_block, 0, sizeof(null_block));
+
+	blend_offset = gen6_create_cc_blend(batch);
+	null_block_offset = OUT_STATE_STRUCT(null_block, 64);
+
 	OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2));
-	OUT_BATCH_STATE_OFFSET(blend | 1);
-	OUT_BATCH(1024 | 1);
-	OUT_BATCH(1024 | 1);
+	OUT_BATCH_STATE_OFFSET(blend_offset | 1);
+	/* color calc state */
+	OUT_BATCH_STATE_OFFSET(null_block_offset | 1);
+	/* depth stencil state */
+	OUT_BATCH_STATE_OFFSET(null_block_offset | 1);
 }
 
 static void
@@ -354,24 +387,6 @@ gen6_create_cc_viewport(struct intel_batchbuffer *batch)
 }
 
 static uint32_t
-gen6_create_cc_blend(struct intel_batchbuffer *batch)
-{
-	struct gen6_blend_state blend;
-
-	memset(&blend, 0, sizeof(blend));
-
-	blend.blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO;
-	blend.blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE;
-	blend.blend0.blend_func = GEN6_BLENDFUNCTION_ADD;
-	blend.blend0.blend_enable = 1;
-
-	blend.blend1.post_blend_clamp_enable = 1;
-	blend.blend1.pre_blend_clamp_enable = 1;
-
-	return OUT_STATE_STRUCT(blend, 64);
-}
-
-static uint32_t
 gen6_create_kernel(struct intel_batchbuffer *batch)
 {
 	return intel_batch_state_copy(batch, ps_kernel_nomask_affine,
@@ -463,7 +478,7 @@ static void gen6_emit_vertex_buffer(struct intel_batchbuffer *batch)
 void gen6_setup_null_render_state(struct intel_batchbuffer *batch)
 {
 	uint32_t wm_state, wm_kernel, wm_table;
-	uint32_t cc_vp, cc_blend;
+	uint32_t cc_vp;
 
 	wm_table  = gen6_bind_surfaces(batch);
 	wm_kernel = gen6_create_kernel(batch);
@@ -472,7 +487,6 @@ void gen6_setup_null_render_state(struct intel_batchbuffer *batch)
 					SAMPLER_EXTEND_NONE);
 
 	cc_vp = gen6_create_cc_viewport(batch);
-	cc_blend = gen6_create_cc_blend(batch);
 
 	gen6_emit_invariant(batch);
 	gen6_emit_state_base_address(batch);
@@ -488,7 +502,7 @@ void gen6_setup_null_render_state(struct intel_batchbuffer *batch)
 	gen6_emit_null_depth_buffer(batch);
 
 	gen6_emit_drawing_rectangle(batch);
-	gen6_emit_cc(batch, cc_blend);
+	gen6_emit_cc(batch);
 	gen6_emit_sampler(batch, wm_state);
 	gen6_emit_sf(batch);
 	gen6_emit_wm(batch, wm_kernel);
-- 
2.11.0



More information about the Intel-gfx mailing list