[Intel-gfx] [PATCH] drm/i915: Add comments for WaKeepPG1ActiveDueToDMCIssue

Vivi, Rodrigo rodrigo.vivi at intel.com
Mon Aug 14 17:59:14 UTC 2017


On Mon, 2017-08-14 at 13:41 +0300, Mika Kuoppala wrote:
> skl,kbl and cnl need to keep pg1 active unconditionally. We
> already do this but the workaround name was missing, add it.
> 
> Cc: Imre Deak <imre.deak at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index e77e84a6fd2f..bc5bd86d663f 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2566,6 +2566,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
>  	mutex_lock(&power_domains->lock);
>  
>  	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
> +	/* WaKeepPG1ActiveDueToDMCIssue:skl,kbl */
>  	intel_power_well_enable(dev_priv, well);
>  
>  	well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
> @@ -2741,6 +2742,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
>  	 */
>  	mutex_lock(&power_domains->lock);
>  	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
> +	/* WaKeepPG1ActiveDueToDMCIssue:cnl */


I don't believe that the workaround is here.
This is only part of regular sequence to initialize display
"Enable Power Well 1 (PG1)"

Maybe the workaround is on the definition of the domain itself:

/* Handled by the DMC firmware
*/                                                  
     .domains = 0, 

Maybe we should do something like:
- /* Handled by the DMC firmware
*/                                                  
+ /* WaKeepPG1ActiveDueToDMCIssue:cnl */


But a follow-up question is: what should we do with BXT and GLK?
Since this Wa is only mentioned for SKL, KBL and CNL, but we are using
the same logic for all of them.

(For CFL let's assume == KBL because DMC firmware is the same)

>  	intel_power_well_enable(dev_priv, well);
>  	mutex_unlock(&power_domains->lock);
>  



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