[Intel-gfx] [PATCH 09/22] drm/i915: enable IPS bit for 64K pages

Chris Wilson chris at chris-wilson.co.uk
Tue Aug 15 18:48:44 UTC 2017


Quoting Matthew Auld (2017-08-15 19:12:02)
> +       /* To support 64K PTE's we need to first enable the use of the
> +        * Intermediate-Page-Size(IPS) bit of the PDE field via some magical
> +        * mmio, otherwise the page-walker will simply ignore the IPS bit. This
> +        * shouldn't be needed after GEN10.
> +        */
> +       if (HAS_PAGE_SIZE(dev_priv, I915_GTT_PAGE_SIZE_64K) &&

I presume we have some vague acknowledgement that snb+ can do 64k, so
don't we need a IS_GEN(i915, 8, 10) here or is GEN8_GAM_ECO_DEV_RW_IA
badly named? Or was snb just 32k like ilk?

> +           INTEL_GEN(dev_priv) <= 10)
> +               I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,
> +                          I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
> +                          GAMW_ECO_ENABLE_64K_IPS_FIELD);
> +


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