[Intel-gfx] [PATCH] drm/i915: Split pin mapping into per platform functions
Srivatsa, Anusha
anusha.srivatsa at intel.com
Thu Aug 17 21:29:06 UTC 2017
>-----Original Message-----
>From: Zanoni, Paulo R
>Sent: Thursday, August 17, 2017 1:24 PM
>To: Srivatsa, Anusha <anusha.srivatsa at intel.com>; intel-
>gfx at lists.freedesktop.org
>Cc: Ville Syrjala <ville.syrjala at linux.intel.com>; Vivi, Rodrigo
><rodrigo.vivi at intel.com>; Taylor, Clinton A <clinton.a.taylor at intel.com>
>Subject: Re: [PATCH] drm/i915: Split pin mapping into per platform functions
>
>Em Qua, 2017-08-16 às 16:45 -0700, Anusha Srivatsa escreveu:
>> Cleanup the code. Map the pins in accordance to individual platforms
>> rather than according to ports.
>> Create separate functions for platforms.
>>
>> v2:
>> - Add missing condition for CoffeeLake. Make platform
>> specific functions static. Add function
>> i915_ddc_pin_mapping().
>>
>> v3:
>> - Rename functions to x_port_to_ddc_pin() which directly
>> indicates the purpose. Correct default return values on CNP
>> and BXT. Rename i915_port_to_ to g4x_port_to since that was
>> the first platform to run this. Correct code style. (Paulo)
>>
>
>Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
Thanks for the review Paulo!
Anusha
>> Sugested-by Ville Syrjala <ville.syrjala at linux.intel.com>
>> Cc: Ville Syrjala <ville.syrjala at linux.intel.com>
>> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
>> Cc: Clinton Tayloe <clinton.a.taylor at intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_hdmi.c | 113
>> ++++++++++++++++++++++++++++++--------
>> 1 file changed, 91 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
>> b/drivers/gpu/drm/i915/intel_hdmi.c
>> index e30c27a..e8abea7 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -1843,45 +1843,114 @@ void
>> intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
>> DRM_DEBUG_KMS("sink scrambling handled\n");
>> }
>>
>> -static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
>> - enum port port)
>> +static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> enum port port)
>> {
>> - const struct ddi_vbt_port_info *info =
>> - &dev_priv->vbt.ddi_port_info[port];
>> u8 ddc_pin;
>>
>> - if (info->alternate_ddc_pin) {
>> - DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
>> (VBT)\n",
>> - info->alternate_ddc_pin,
>> port_name(port));
>> - return info->alternate_ddc_pin;
>> + switch (port) {
>> + case PORT_B:
>> + ddc_pin = GMBUS_PIN_DPB;
>> + break;
>> + case PORT_C:
>> + ddc_pin = GMBUS_PIN_DPC;
>> + break;
>> + case PORT_D:
>> + ddc_pin = GMBUS_PIN_DPD_CHV;
>> + break;
>> + default:
>> + MISSING_CASE(port);
>> + ddc_pin = GMBUS_PIN_DPB;
>> + break;
>> }
>> + return ddc_pin;
>> +}
>> +
>> +static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> enum port port)
>> +{
>> + u8 ddc_pin;
>>
>> switch (port) {
>> case PORT_B:
>> - if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
>> - ddc_pin = GMBUS_PIN_1_BXT;
>> - else
>> - ddc_pin = GMBUS_PIN_DPB;
>> + ddc_pin = GMBUS_PIN_1_BXT;
>> break;
>> case PORT_C:
>> - if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
>> - ddc_pin = GMBUS_PIN_2_BXT;
>> - else
>> - ddc_pin = GMBUS_PIN_DPC;
>> + ddc_pin = GMBUS_PIN_2_BXT;
>> + break;
>> + default:
>> + MISSING_CASE(port);
>> + ddc_pin = GMBUS_PIN_1_BXT;
>> + break;
>> + }
>> + return ddc_pin;
>> +}
>> +
>> +static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> + enum port port)
>> +{
>> + u8 ddc_pin;
>> +
>> + switch (port) {
>> + case PORT_B:
>> + ddc_pin = GMBUS_PIN_1_BXT;
>> + break;
>> + case PORT_C:
>> + ddc_pin = GMBUS_PIN_2_BXT;
>> break;
>> case PORT_D:
>> - if (HAS_PCH_CNP(dev_priv))
>> - ddc_pin = GMBUS_PIN_4_CNP;
>> - else if (IS_CHERRYVIEW(dev_priv))
>> - ddc_pin = GMBUS_PIN_DPD_CHV;
>> - else
>> - ddc_pin = GMBUS_PIN_DPD;
>> + ddc_pin = GMBUS_PIN_4_CNP;
>> + break;
>> + default:
>> + MISSING_CASE(port);
>> + ddc_pin = GMBUS_PIN_1_BXT;
>> + break;
>> + }
>> + return ddc_pin;
>> +}
>> +
>> +static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> + enum port port)
>> +{
>> + u8 ddc_pin;
>> +
>> + switch (port) {
>> + case PORT_B:
>> + ddc_pin = GMBUS_PIN_DPB;
>> + break;
>> + case PORT_C:
>> + ddc_pin = GMBUS_PIN_DPC;
>> + break;
>> + case PORT_D:
>> + ddc_pin = GMBUS_PIN_DPD;
>> break;
>> default:
>> MISSING_CASE(port);
>> ddc_pin = GMBUS_PIN_DPB;
>> break;
>> }
>> + return ddc_pin;
>> +}
>> +
>> +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
>> + enum port port)
>> +{
>> + const struct ddi_vbt_port_info *info =
>> + &dev_priv->vbt.ddi_port_info[port];
>> + u8 ddc_pin;
>> +
>> + if (info->alternate_ddc_pin) {
>> + DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
>> (VBT)\n",
>> + info->alternate_ddc_pin,
>> port_name(port));
>> + return info->alternate_ddc_pin;
>> + }
>> +
>> + if (IS_CHERRYVIEW(dev_priv))
>> + ddc_pin = chv_port_to_ddc_pin(dev_priv, port);
>> + else if (IS_GEN9_LP(dev_priv))
>> + ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
>> + else if (HAS_PCH_CNP(dev_priv))
>> + ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
>> + else
>> + ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
>>
>> DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform
>default)\n",
>> ddc_pin, port_name(port));
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