[Intel-gfx] [PATCH v2 11/16] drm/i915: Rewrite GMCH irq handlers to avoid loops

[Chris Wilson]

Quoting ville.syrjala at linux.intel.com (2017-08-18 19:37:00)
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Eliminate the loops from the gen2-3 irq handlers. Since we don't use
> MSI anymore on these platforms, and thus the CPU interrupt will be level
> triggered, we shouldn't need to play any tricks with IER to induce edges
> from IIR. IIR itself still detects only edges from PIPESTAT & co. on
> gen4 but since IIR is double buffered and we only clear one bit per irq
> handler invocation we can use the normal "clear PIPESTAT & co. -> clear
> IIR" approach to ack the interrupts. On gen2 everything is level
> triggered, and gen3 presumably follows either the gen2 or gen4 approach
> since nothing else would really make sense.
> 
> v2: Drop the IER tricks since we no longer use MSI
> 
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> #v1
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>