[Intel-gfx] [RFCv6 2/2] drm/i915: Introduce private PAT management

[Wang, Zhi A]

I see. Thanks for the explanation! :)

-----Original Message-----
From: Joonas Lahtinen [mailto:joonas.lahtinen at linux.intel.com] 
Sent: Thursday, August 31, 2017 5:20 PM
To: Wang, Zhi A <zhi.a.wang at intel.com>; Vivi, Rodrigo <rodrigo.vivi at intel.com>
Cc: intel-gfx at lists.freedesktop.org; zhenyuw at linux.intel.com; intel-gvt-dev at lists.freedesktop.org; chris at chris-wilson.co.uk; Widawsky, Benjamin <benjamin.widawsky at intel.com>
Subject: Re: [RFCv6 2/2] drm/i915: Introduce private PAT management

On Thu, 2017-08-31 at 08:28 +0000, Wang, Zhi A wrote:
> Do you mean I still keep I915_WRITE(xxxxx) in xxxx_setup_private_pat() like before? Then changed them in a new patch? 

No, I mean use the new code structure, but make sure all register writes are equal to what they were before (and please send a separate patch for the CNL caching issue before that).

Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation