[Intel-gfx] [PATCH v2] drm/i915/execlists: Cache ELSP register offset

[Chris Wilson]

Quoting Rodrigo Vivi (2017-12-07 23:04:13)
> On Thu, Dec 07, 2017 at 10:24:34PM +0000, Chris Wilson wrote:
> > Currently on every submission, we recalculate the ELSP register offset
> > for the engine, after chasing the pointers to find the iomem base. Since
> > this is fixed for the lifetime of the driver record the offset in the
> > execlists struct.
> > 
> > In practice the difference is negligible, it just happens to remove 27
> > bytes of eyesore pointer dancing from next to the hottest instruction
> > (which is itself due to stalling for a cache miss) in perf profiles of
> > the execlists_submission_tasklet().
> > 
> > v2: Trim off one more elsp local.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Reviewed-by: Michel Thierry <michel.thierry at intel.com>
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> 
> would this be useful somehow on error state?

Nope, write-only register. We do how what we think is in ELSP, i.e. what
we last wrote to ELSP.
-Chris